https://sourceware.org/bugzilla/show_bug.cgi?id=22871
Linus Torvalds <torva...@linux-foundation.org> changed:
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CC| |torvalds@linux-foundation.o
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--- Comment #4 from Linus Torvalds <torva...@linux-foundation.org> ---
(In reply to H.J. Lu from comment #3)
>
> We need to keep
>
> andq imm31, mem
Yes.
> and optimize testq to
>
> testl imm31, mem
This one isn't quite as obvious. There *may* be microarchitectures that could
have problems doing store buffer forwarding of a previous 64-bit write to a the
32-bit read of the "testl".
I _think_ all intel microarchitectures handle it fine for the "same address"
case, but I'm not 100% sure. I know I've seen a table of "these forwardings are
fast", but I don't recall where.
The intel optimization manual does specify the rules for various
microarchitectures, and they all _seem_ to state that a smaller load forwards
fine from a larger store at the same address. But I don't find any generic
statement that that is always true.
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