https://sourceware.org/bugzilla/show_bug.cgi?id=25403
--- Comment #2 from cvs-commit at gcc dot gnu.org <cvs-commit at gcc dot gnu.org> --- The binutils-2_34-branch branch has been updated by Tamar Christina <tnfch...@sourceware.org>: https://sourceware.org/git/gitweb.cgi?p=binutils-gdb.git;h=2cd7b00eb1337e427fa6149779157d8638eb57d9 commit 2cd7b00eb1337e427fa6149779157d8638eb57d9 Author: Tamar Christina <tamar.christ...@arm.com> Date: Mon Jan 27 10:40:02 2020 +0000 AArch64: Fix cfinv disassembly issues This fixes the preferred disassembly for cfinv. The Armv8.4-a instruction overlaps with the possible encoding space for msr. This because msr allows you to use unallocated encoding space using the general sA_B_cC_cD_E form. However when an encoding does become allocated then we need to ensure that it's used as the preferred disassembly. The problem with cfinv is that its mask has all bits sets because it has no arguments. This causes issues for the Alias resolver in gas as it uses the mask to build alias graph. In this case it can't do it since it thinks almost everything would alias with cfinv. So instead we can only fix this by moving cfinv before msr. gas/ChangeLog: PR 25403 * testsuite/gas/aarch64/armv8_4-a.d: Add cfinv. * testsuite/gas/aarch64/armv8_4-a.s: Likewise. opcodes/ChangeLog: PR 25403 * aarch64-tbl.h (struct aarch64_opcode): Re-order cfinv. * aarch64-asm-2.c: Regenerate * aarch64-dis-2.c: Likewise. * aarch64-opc-2.c: Likewise. (cherry picked from commit 7568c93bf95a518797dfb2987b04911164c14a36) -- You are receiving this mail because: You are on the CC list for the bug.
