https://sourceware.org/bugzilla/show_bug.cgi?id=30120
--- Comment #2 from Michael Matz <matz at suse dot de> --- Came in with bd7828084 "x86: use ModR/M for FPU insns with operands". The proper Reg field of ModRM for the popping variant of fucom is '5' not '4'. So this: --- a/opcodes/i386-opc.tbl +++ b/opcodes/i386-opc.tbl @@ -651,7 +651,7 @@ fcompp, 0xded9, FP, NoSuf, {} fucom, 0xdd/4, i387, Modrm|NoSuf, { FloatReg } // alias for fucom %st(1) fucom, 0xdde1, i387, NoSuf, {} -fucomp, 0xdd/4, i387, Modrm|NoSuf, { FloatReg } +fucomp, 0xdd/5, i387, Modrm|NoSuf, { FloatReg } // alias for fucomp %st(1) fucomp, 0xdde9, i387, NoSuf, {} fucompp, 0xdae9, i387, NoSuf, {} (didn't check the other insns touched by the patch) -- You are receiving this mail because: You are on the CC list for the bug.