https://sourceware.org/bugzilla/show_bug.cgi?id=33216
Bug ID: 33216
Summary: [RISCV] Allow c.slli, c.srai, c.srli with 0 immediate
as a hint
Product: binutils
Version: unspecified
Status: UNCONFIRMED
Severity: normal
Priority: P2
Component: gas
Assignee: unassigned at sourceware dot org
Reporter: craig.topper at gmail dot com
Target Milestone: ---
Historically a zero shift amount was reserved to encode c.slli64, c.srai64, and
c.srli64 instructions for RV128. For RV32 and RV64 binutils allows c.slli64,
c.srai64, and c.srli64 mnemonics to be used as a hint.
Recently all mentions of c.slli64, c.srai64, and c.srli64 have been removed
from the riscv-isa-manual. c.slli, c.srli, and c.srai with 0 immediate are now
listed as hints. https://github.com/riscv/riscv-isa-manual/pull/1942 and
https://github.com/riscv/riscv-isa-manual/pull/2093
I think gas should be updated to allow c.slli, c.srli, and c.srai with 0
immediate as a hint. c.slli64, c.srai64, and c.srli64 should be kept as
aliases. objdump should disassemble to c.slli, c.srli, and c.srai with 0
immediate.
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