Hi all. Can I ask for some advice regarding one aspect of CVS that is not at all clear from the CVS manual please?
One of the projects I'm involved with is the ELKS project, hosted at http://elks.sf.net/ and there's one aspect of it that causes a CVS headache. Part of the "build" process (as with the Linux project) is the `make dep` stage, where dependency information is generated depending on the configuration options chosen. In the Linux project, this dependency information is collected into separate .depend files, but in the ELKS information, it is automatically appended to the end of the Makefile's themselves, and it is this difference that causes the headache. The procedure used involves having the following rules in a common file that is included from every Makefile in the source tree (one in every directory)... ===============8<=============== CUT ===============>8=============== dodep: $(DEPEND) @if \ls *.c > /dev/null 2>&1 ; then ${MAKE} mkdep ; fi @for DIR in */ ; do \ if [ -f "$$DIR/Makefile" ]; then \ ${MAKE} -C "$$DIR" dodep ; \ fi ; \ done mkdep: @sed '/\#\#\# Dependencies:/q' < Makefile > make.tmp @echo >> make.tmp @for FILE in *.c ; do \ echo $(CC_PROTO) "$${FILE}" >> make.tmp ; \ $(CC_PROTO) "$${FILE}" >> make.tmp ; \ printf '\n\n' >> make.tmp ; \ done @if ! diff Makefile make.tmp > /dev/null ; then \ echo -n 'Assigning dependencies: ' ; \ mv -fv make.tmp Makefile ; \ else \ rm -f make.tmp ; \ fi nodep: @sed '/\#\#\# Dependencies:/q' < Makefile > make.tmp @if ! diff Makefile make.tmp > /dev/null ; then \ echo -n 'Removing dependencies: ' ; \ mv -fv make.tmp Makefile ; \ else \ rm -f make.tmp ; \ fi @for DIR in */ ; do \ if [ -f "$$DIR/Makefile" ]; then \ ${MAKE} -C "$$DIR" nodep ; \ fi ; \ done ===============8<=============== CUT ===============>8=============== ...and having the following in the Makefile in the base directory only... ===============8<=============== CUT ===============>8=============== dep: include/linuxmt/autoconf.h @make dodep @echo @echo ' * Dependencies configured. Next, you need to run one of the' @echo ' * following commands:' @echo ' *' @echo ' * `make Image` to create a kernel image ready to boot' @echo ' * from floppy diskette, or' @echo ' *' @echo ' * `make nbImage` to create a kernel image ready to boot' @echo ' * across a network connection.' @echo ===============8<=============== CUT ===============>8=============== ...with the static part of each Makefile ends with the following two lines... ===============8<=============== CUT ===============>8=============== ######################################################################### ### Dependencies: ===============8<=============== CUT ===============>8=============== ...and the `make dep` procedure first strips out everything following those two lines, then appends the dependency information related to the current configuration for the source files in that directory to the end of the resulting file. The problem is that these Makefiles are of course in the CVS tree, and the preference is that they should be stored there with the dependency information missing. To do this, it is required that the person who is committing patches runs `make nodep` on their working tree before performing the `cvs commit` stage. Is there any way to automate this, thus causing any `cvs commit` command to result in an attempt to run `make nodep` locally before the commit takes place, thus ensuring that these Makefiles remain clean? Best wishes from Riley. _______________________________________________ Bug-cvs mailing list [EMAIL PROTECTED] http://mail.gnu.org/mailman/listinfo/bug-cvs
