Respected Sir,
 
         We are using your GNU gdb toolkit for the Verification of MIPS R4300. We would like to report
 
certain bugs in your gdb Simulator for MIPS R4xxx and also the evaluation board. The bug report
 
with the other details needed by you is as follows:
 
1. The version of GDB used by us is GNU gdb 4.17-vr4xxx-990510.
 
2. The type of machine we are using and the operating system on it --
  
      (a) Celeron 466 MHz, 64 MB with Windows NT 4.0 as Operating System.
 
      (b) Pentium - III, 128 MB with Windows NT Workstation 4.0 Operating System.
 
Bug Report:
 
 The Bugs that we think exists in your GNU gdb simulator are as follows:
 
1. The simulator does not sign-extend the Load-link register i.e $31 in case of
    Load link type of instructions in 32-bit mode. We would like to know whether
    there is some problem with the simulator or are there some settings to be
    made.
 
2. The Status Register is internally updated by the following group of instruction:
 
                       li $10,0x34400000(appropirate value)
                       mtc0 $10,$12
 
   but the same change is not visible, when we give the command "info all-registers",
   which is to show all the registers.
 
3. The Evaluation Board is not supporting any Double precesion instructions like,
   
                       mul.d $f3,$f5
                       div.d  $f3,$f5
 
   even when the processor is in 64-bit mode
.
  
 
4. Double precesion values are not displayed using the command "info all-registers",
   even if we enter double precision data into the Floating Point registers using
   the group of instructions,
 
                       li $10,double precesion value
                       dmtc1 $10,$f2
 
   even if we are in Kernel Mode or 64-bit User Mode.
 
5. The simulator is not generating any FPU related exceptions, while the same are
   generated by the Evaluation Board.
 
6. TLB related instruction like,
 
                       TLBP
                       TLBR
                       TLBWI
                       TLBWR
 
   are not supported by the simulator. Also as per the MIPS R4300 specifications
   only the upper 6-bits of the INDEX register are writable but the simulator
   updates all the 32 bits of the same. No care is also taken when the same are
   read into some General Purpose Register, the same updated data is written into
   that General Purpose Register, which is wrong.
 

         That's all from our side. I hope you will understand all the bugs listed by me
 
   and reply me at the earliest.
 

          Waiting for your prompt reply.
 

With Regards,
 
e-Infochips Team,
e-Infochips Pvt. Ltd.
303, Parishram Building,
Mithakhali Six Roads,
Ahmedabad(Gujarat), India.
 
 
 
 
   
  
 
 
 
 

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