> Thread B on Processor B sees isCreated = 1, but still has a stale > value (nil) for 'theInstance' in its L1/L2 memory cache > and returns the nil.
I can't imagine that this would ever happen - if processors in an SMP system had independent caches such that they saw different cached values for the same location then it wouldnt work at all. The cache consistency mechanism is there to ensure that this never happens, so it shouldnt be an issue. -bat. _______________________________________________ Bug-gnustep mailing list Bug-gnustep@gnu.org http://lists.gnu.org/mailman/listinfo/bug-gnustep
