> You can build a CPU ID table on the BSP, and associate CPU IDs > with all local APIC IDs discovered, and use that look-up table later > to obtain a CPU ID from the local APIC ID of the CPU running the code.
It's my idea, of course. I don't know what you refer to exactly with "using a segment register". How Does It Work? Maybe, in next versions, I can improve the implementation using that. El jue., 30 jul. 2020 a las 23:12, Richard Braun (<rbr...@sceen.net>) escribió: > On Thu, Jul 30, 2020 at 10:09:01PM +0100, Jessica Clarke wrote: > > > It's physically memory mapped to the local APIC address space, but > > > because of that, it's also not optimal. All systems I know use a scheme > > > similar to TLS, i.e. using the fs or gs segment register, to fetch > > > a per-CPU structure and from it, per-CPU data. This avoids relying on > > > hardware running at a lower frequency than the CPU. > > > > You need to do that anyway if you want any guarantees over _what_ the > > IDs are (normally you want 0 for the BSP, 1 to N-1 for the APs). > > Not really. You can build a CPU ID table on the BSP, and associate CPU IDs > with all local APIC IDs discovered, and use that look-up table later > to obtain a CPU ID from the local APIC ID of the CPU running the code. > It's just too slow compared to using a segment register. > > -- > Richard Braun >
