Hello, I had to disable the patch, it is making the boot hang, see log below, it stays stuck at that point.
Samuel GNU Mach 1.8+git20230410-486-dbg ELF section header table at c0010370 biosmem: physical memory map: biosmem: 000000000000000000:00000000000009f000, available biosmem: 00000000000009fc00:0000000000000a0000, reserved biosmem: 0000000000000f0000:000000000000100000, reserved biosmem: 000000000000100000:0000000000dddde000, available biosmem: 0000000000dddde000:0000000000dde00000, reserved biosmem: 0000000000feffc000:0000000000ff000000, reserved biosmem: 0000000000fffc0000:000000000100000000, reserved Loaded ELF symbol table for mach (4565 symbols) vm_page: page table size: 908750 entries (49700k) vm_page: DMA: pages: 4080 (15M), free: 0 (0M) vm_page: DMA: min:500 low:600 high:1000 vm_page: DIRECTMAP: pages: 219136 (856M), free: 199964 (781M) vm_page: DIRECTMAP: min:10956 low:13148 high:21913 vm_page: HIGHMEM: pages: 685534 (2677M), free: 0 (0M) vm_page: HIGHMEM: min:34276 low:41132 high:68553 pcibios_init : BIOS32 Service Directory structure at 0xf6040 pcibios_init : BIOS32 Service Directory entry at 0xfd26c pcibios_init : PCI BIOS revision 2.10 entry at 0xfd1ca Probing PCI hardware. Floppy drive(s): fd0 is 2.88M AMI BIOS intnull(6) FDC 0 is a S82078B probing scsi 15/16: ncr53c8xx - revision 2.5f.1 done scsi : 0 hosts. scsi : detected total. com 2 out of range lpr0: at atbus0, port = 378x, spl = 6d, pic = 7. RTC time is 2023-05-07 16:04:02 module 0: acpi --host-priv-port=${host-port} --device-master-port=${device-port} --next-task=${pci-task} $(task-create) $(task-resume) module 1: pci-arbiter --next-task=${disk-task} $(pci-task=task-create) module 2: rumpdisk --next-task=${fs-task} $(disk-task=task-create) module 3: ext2fs --readonly --multiboot-command-line=${kernel-command-line} --exec-server-task=${exec-task} -T typed ${root} $(fs-task=task-create) module 4: exec /hurd/exec $(exec-task=task-create) 5 multiboot modules task loaded: acpi --host-priv-port=1 --device-master-port=2 --next-task=3 task loaded: pci-arbiter --next-task=1 task loaded: rumpdisk --next-task=1 task loaded: ext2fs --readonly --multiboot-command-line=root=device:wd1 console=com0 noide --exec-server-task=1 -T typed device:wd1 task loaded: exec /hurd/exec start acpi: acpi pci rumpdisk [ 1.0000000] Copyright (c) 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, [ 1.0000000] 2006, 2007, 2008, 2009, 2010, 2011, 2012, 2013, 2014, 2015, 2016, 2017, [ 1.0000000] 2018, 2019, 2020, 2021 The NetBSD Foundation, Inc. All rights reserved. [ 1.0000000] Copyright (c) 1982, 1986, 1989, 1991, 1993 [ 1.0000000] The Regents of the University of California. All rights reserved. [ 1.0000000] NetBSD 9.99.88 (RUMP-ROAST) [ 1.0000000] total memory = unlimited (host limit) [ 1.0000000] timecounter: Timecounters tick every 10.000 msec [ 1.0000040] timecounter: Timecounter "clockinterrupt" frequency 100 Hz quality 0 [ 1.0000050] cpu0 at thinair0: rump virtual cpu [ 1.0000050] entropy: WARNING: extracting entropy too early [ 1.0200050] root file system type: rumpfs [ 1.0200050] kern.module.path=/stand/i386/9.99.88/modules [ 1.0200050] mainbus0 (root) [ 1.0200050] pci0 at mainbus0 bus 0 [ 1.0200050] pci0: i/o space, memory space enabled, rd/line, rd/mult, wr/inv ok [ 1.0200050] vendor 8086 product 1237 (host bridge, revision 0x02) at pci0 dev 0 function 0 not configured [ 1.0200050] vendor 8086 product 7000 (ISA bridge) at pci0 dev 1 function 0 not configured [ 1.0200050] piixide0 at pci0 dev 1 function 1: Intel 82371SB IDE Interface (PIIX3) (rev. 0x00) [ 1.0200050] piixide0: bus-master DMA support present [ 1.0200050] piixide0: primary channel wired to compatibility mode irq handler [10]: new delivery port f5f93758 entry f56b1e20 [ 1.0600050] atabus0 at piixide0 channel 0 [ 1.0600050] piixide0: secondary channel wired to compatibility mode ACPI: RSDP 0x00000000000F59C0 000014 (v00 BOCHS ) ACPI: RSDT 0x00000000DDDE1AC6 000034 (v01 BOCHS BXPC 00000001 BXPC 00000001) ACPI: FACP 0x00000000DDDE197A 000074 (v01 BOCHS BXPC 00000001 BXPC 00000001) ACPI: DSDT 0x00000000DDDE0040 00193A (v01 BOCHS BXPC 00000001 BXPC 00000001) ACPI: FACS 0x00000000DDDE0000 000040 ACPI: APIC 0x00000000DDDE19EE 000078 (v01 BOCHS BXPC 00000001 BXPC 00000001) ACPI: HPET 0x00000000DDDE1A66 000038 (v01 BOCHS BXPC 00000001 BXPC 00000001) ACPI: WAET 0x00000000DDDE1A9E 000028 (v01 BOCHS BXPC 00000001 BXPC 00000001) Module-level evaluation : (Definition Block level) Module-level complete : (Definition Block level) ACPI table initialization: Table [DSDT: BXPC ] (id 01) - 343 Objects with 51 Devices, 7 Regions, 104 Methods (45/59/4 Serial/Non/Cvt) ACPI: 1 ACPI AML tables successfully acquired and loaded Final data object initialization: Namespace contains 352 (0x160) objects evxfevnt-0063 enable : Transition to ACPI mode successful Initializing General Purpose Events (GPEs): Initialized GPE 00 to 0F [_GPE] 2 regs on interrupt 0x9 (SCI) TODO: add interrupt handler for acpi Initializing Device/Processor/Thermal objects and executing _INI/_STA methods: Enter evaluation : _SB.PCI0.PRES._INI (Method) Exit evaluation : _SB.PCI0.PRES._INI Executed 1 _INI methods requiring 0 _STA executions (examined 54 objects) PASS! Enter evaluation : _SB.PCI0._ADR (Integer) Exit evaluation : _SB.PCI0._ADR Enter evaluation : _SB.PCI0.S00._ADR (Integer) Exit evaluation : _SB.PCI0.S00._ADR Enter evaluation : _SB.PCI0.S08._ADR (Integer) Exit evaluation : _SB.PCI0.S08._ADR Enter evaluation : _SB.PCI0.S08.FDC0.FLPA._ADR (Integer) Exit evaluation : _SB.PCI0.S08.FDC0.FLPA._ADR Enter evaluation : _SB.PCI0.S10._ADR (Integer) Exit evaluation : _SB.PCI0.S10._ADR Enter evaluation : _SB.PCI0.S18._ADR (Integer) Exit evaluation : _SB.PCI0.S18._ADR Enter evaluation : _SB.PCI0.S20._ADR (Integer) Exit evaluation : _SB.PCI0.S20._ADR Enter evaluation : _SB.PCI0.S28._ADR (Integer) Exit evaluation : _SB.PCI0.S28._ADR Enter evaluation : _SB.PCI0.S30._ADR (Integer) Exit evaluation : _SB.PCI0.S30._ADR Enter evaluation : _SB.PCI0.S38._ADR (Integer) Exit evaluation : _SB.PCI0.S38._ADR Enter evaluation : _SB.PCI0.S40._ADR (Integer) Exit evaluation : _SB.PCI0.S40._ADR Enter evaluation : _SB.PCI0.S48._ADR (Integer) Exit evaluation : _SB.PCI0.S48._ADR Enter evaluation : _SB.PCI0.S50._ADR (Integer) Exit evaluation : _SB.PCI0.S50._ADR Enter evaluation : _SB.PCI0.S58._ADR (Integer) Exit evaluation : _SB.PCI0.S58._ADR Enter evaluation : _SB.PCI0.S60._ADR (Integer) Exit evaluation : _SB.PCI0.S60._ADR Enter evaluation : _SB.PCI0.S68._ADR (Integer) Exit evaluation : _SB.PCI0.S68._ADR Enter evaluation : _SB.PCI0.S70._ADR (Integer) Exit evaluation : _SB.PCI0.S70._ADR Enter evaluation : _SB.PCI0.S78._ADR (Integer) Exit evaluation : _SB.PCI0.S78._ADR Enter evaluation : _SB.PCI0.S80._ADR (Integer) Exit evaluation : _SB.PCI0.S80._ADR Enter evaluation : _SB.PCI0.S88._ADR (Integer) Exit evaluation : _SB.PCI0.S88._ADR Enter evaluation : _SB.PCI0.S90._ADR (Integer) Exit evaluation : _SB.PCI0.S90._ADR Enter evaluation : _SB.PCI0.S98._ADR (Integer) Exit evaluation : _SB.PCI0.S98._ADR Enter evaluation : _SB.PCI0.SA0._ADR (Integer) Exit evaluation : _SB.PCI0.SA0._ADR Enter evaluation : _SB.PCI0.SA8._ADR (Integer) Exit evaluation : _SB.PCI0.SA8._ADR Enter evaluation : _SB.PCI0.SB0._ADR (Integer) Exit evaluation : _SB.PCI0.SB0._ADR Enter evaluation : _SB.PCI0.SB8._ADR (Integer) Exit evaluation : _SB.PCI0.SB8._ADR Enter evaluation : _SB.PCI0.SC0._ADR (Integer) Exit evaluation : _SB.PCI0.SC0._ADR Enter evaluation : _SB.PCI0.SC8._ADR (Integer) Exit evaluation : _SB.PCI0.SC8._ADR Enter evaluation : _SB.PCI0.SD0._ADR (Integer) Exit evaluation : _SB.PCI0.SD0._ADR Enter evaluation : _SB.PCI0.SD8._ADR (Integer) Exit evaluation : _SB.PCI0.SD8._ADR Enter evaluation : _SB.PCI0.SE0._ADR (Integer) Exit evaluation : _SB.PCI0.SE0._ADR Enter evaluation : _SB.PCI0.SE8._ADR (Integer) Exit evaluation : _SB.PCI0.SE8._ADR Enter evaluation : _SB.PCI0.SF0._ADR (Integer) Exit evaluation : _SB.PCI0.SF0._ADR Enter evaluation : _SB.PCI0.SF8._ADR (Integer) Exit evaluation : _SB.PCI0.SF8._ADR Enter evaluation : _SB.PCI0._ADR (Integer) Exit evaluation : _SB.PCI0._ADR Enter evaluation : _SB.PCI0.S00._ADR (Integer) Exit evaluation : _SB.PCI0.S00._ADR Enter evaluation : _SB.PCI0.S08._ADR (Integer) Exit evaluation : _SB.PCI0.S08._ADR Enter evaluation : _SB.PCI0.S08.FDC0.FLPA._ADR (Integer) Exit evaluation : _SB.PCI0.S08.FDC0.FLPA._ADR Enter evaluation : _SB.PCI0.S10._ADR (Integer) Exit evaluation : _SB.PCI0.S10._ADR Enter evaluation : _SB.PCI0.S18._ADR (Integer) Exit evaluation : _SB.PCI0.S18._ADR Enter evaluation : _SB.PCI0.S20._ADR (Integer) Exit evaluation : _SB.PCI0.S20._ADR Enter evaluation : _SB.PCI0.S28._ADR (Integer) Exit evaluation : _SB.PCI0.S28._ADR Enter evaluation : _SB.PCI0.S30._ADR (Integer) Exit evaluation : _SB.PCI0.S30._ADR Enter evaluation : _SB.PCI0.S38._ADR (Integer) Exit evaluation : _SB.PCI0.S38._ADR Enter evaluation : _SB.PCI0.S40._ADR (Integer) Exit evaluation : _SB.PCI0.S40._ADR Enter evaluation : _SB.PCI0.S48._ADR (Integer) Exit evaluation : _SB.PCI0.S48._ADR Enter evaluation : _SB.PCI0.S50._ADR (Integer) Exit evaluation : _SB.PCI0.S50._ADR Enter evaluation : _SB.PCI0.S58._ADR (Integer) Exit evaluation : _SB.PCI0.S58._ADR Enter evaluation : _SB.PCI0.S60._ADR (Integer) Exit evaluation : _SB.PCI0.S60._ADR Enter evaluation : _SB.PCI0.S68._ADR (Integer) Exit evaluation : _SB.PCI0.S68._ADR Enter evaluation : _SB.PCI0.S70._ADR (Integer) Exit evaluation : _SB.PCI0.S70._ADR Enter evaluation : _SB.PCI0.S78._ADR (Integer) Exit evaluation : _SB.PCI0.S78._ADR Enter evaluation : _SB.PCI0.S80._ADR (Integer) Exit evaluation : _SB.PCI0.S80._ADR Enter evaluation : _SB.PCI0.S88._ADR (Integer) Exit evaluation : _SB.PCI0.S88._ADR Enter evaluation : _SB.PCI0.S90._ADR (Integer) Exit evaluation : _SB.PCI0.S90._ADR Enter evaluation : _SB.PCI0.S98._ADR (Integer) Exit evaluation : _SB.PCI0.S98._ADR Enter evaluation : _SB.PCI0.SA0._ADR (Integer) Exit evaluation : _SB.PCI0.SA0._ADR Enter evaluation : _SB.PCI0.SA8._ADR (Integer) Exit evaluation : _SB.PCI0.SA8._ADR Enter evaluation : _SB.PCI0.SB0._ADR (Integer) Exit evaluation : _SB.PCI0.SB0._ADR Enter evaluation : _SB.PCI0.SB8._ADR (Integer) Exit evaluation : _SB.PCI0.SB8._ADR Enter evaluation : _SB.PCI0.SC0._ADR (Integer) Exit evaluation : _SB.PCI0.SC0._ADR Enter evaluation : _SB.PCI0.SC8._ADR (Integer) Exit evaluation : _SB.PCI0.SC8._ADR Enter evaluation : _SB.PCI0.SD0._ADR (Integer) Exit evaluation : _SB.PCI0.SD0._ADR Enter evaluation : _SB.PCI0.SD8._ADR (Integer) Exit evaluation : _SB.PCI0.SD8._ADR Enter evaluation : _SB.PCI0.SE0._ADR (Integer) Exiirq handler [10]: new delivery port f5f933e8 entry f56b1ec0 [ 1.1800050] atabus1 at piixide0 channel 1 [ 1.1800050] vendor 8086 product 7113 (miscellaneous bridge, revision 0x03) at pci0 dev 1 function 3 not configured [ 1.1800050] vendor 1234 product 1111 (VGA display, revision 0x02) at pci0 dev 2 function 0 not configured [ 1.1800050] vendor 8086 product 100e (ethernet network, revision 0x03) at pci0 dev 3 function 0 not configured [ 1.1800050] vendor 8086 product 100e (ethernet network, revision 0x03) at pci0 dev 4 function 0 not configured [ 1.1800050] ahcisata0 at pci0 dev 5 function 0: vendor 8086 product 2922 (rev. 0x02) [ 1.1800050] ahcisata0: AHCI revision 1.0, 6 ports, 32 slots, CAP 0xc0141f05<SAM,ISS=0x1=Gen1,SNCQ,S64A> irq handler [1]: new delivery port f6185e90 entry f56b1ee0 irq handler [1]: release a dead delivery port f6185e90 entry f56b1ee0