Hello,
Consider the following Makefile:
clean: GOAL= clean
ifneq ($(GOAL),clean)
include foo.mk
endif
clean:
echo $(GOAL)
If I type make clean, I would expect the Makefile to skip inclusion of
foo.mk. However, it does not, and the make reaches an error.
I tried changing GOAL = to GOAL :=, but this did not help.
Is this by intention? I noticed the same behavior in version 3.75.
If I do make GOAL=clean clean, the problem goes away.
- Jim
--
Jim Campbell
[EMAIL PROTECTED]
716/424-3560, x206 (direct)
716/424-4554, x206 (switchboard)
