Hi all! I'm using
GNU Make version 3.79.1, by Richard Stallman and Roland McGrath. Built for i386-redhat-linux-gnu and stumbled across a bug/feature which I could not find anywhere in the documentation, newsgroups or mailing lists (including this one) concerning the recursive use of wildcards. The following Makefile a%: echo $@ requested b%: a% is a variation of the popular %.o: %.c $(CC) -c $< -o $@ theme, just with a recursive definition. Calling make a1 works just fine, outputting echo a1 requested a1 requested calling make b1 should, in my opinion, produce the same output. Unfortunately though, I get make: *** No rule to make target `b1'. Stop. Uh-oh. Am I doing something wrong here or is there some magic command or option I am missing? Or is this a bug/feature? Cheers and many thanks in advance Pedro _______________________________________________ Bug-make mailing list [EMAIL PROTECTED] http://mail.gnu.org/mailman/listinfo/bug-make