On 11/11/05, Paul D. Smith <[EMAIL PROTECTED]> wrote: > %% "Marty Leisner" <[EMAIL PROTECTED]> writes: > > ml> ifneq (,$(findstring clean,$(MAKECMDGOALS))) > ml> NO_DEPENDS=1 > ml> endif > > ml> ifndef NO_DEPENDS > ml> -include $(DEPS) > ml> endif > > ml> I've seen this annoying behavior for years...is there a better > ml> wah t handle this? > > No fundamentally better way. You can be a bit more restrictive of what > you match on by using filter/filter-out for pattern matching instead of > findstring, but that's about it. >
One other possible solution is to remove the rule to generate the .d files (but still include them) and just generate the .d's during the .cc -> .o rule. Since make doesn't have a rule to create the .d file, it won't try to create them if they don't exist when you do the include. Gcc can generate the .d file in addition to the .o file pretty easily just by passing in the -MMD flag. Unfortunately, what gcc actually does with the .d file (as in, which directory it gets stored, what it lists as the target, etc) has changed somewhat drastically between gcc versions (IIRC, between 3.0 -> 3.3 is pretty wacky). So if you know what gcc version you're building with it can be pretty simple. But if you want to be nice and work with a bunch versions (ie: for distribution to others), you'd be stuck writing a bunch of special cases in order to get correct dependencies. In that case, what you have is probably simplest, unless someone else has a better way to get around those flags :) -Mike _______________________________________________ Bug-make mailing list Bug-make@gnu.org http://lists.gnu.org/mailman/listinfo/bug-make
