URL:
<http://savannah.gnu.org/bugs/?51974>
Summary: multiline (define/endef) containing target-specific
assignments causes errors in /bin/sh
Project: make
Submitted by: oss542
Submitted on: Sat 09 Sep 2017 08:45:50 PM UTC
Severity: 3 - Normal
Item Group: Bug
Status: None
Privacy: Public
Assigned to: None
Open/Closed: Open
Discussion Lock: Any
Component Version: 4.2.1
Operating System: POSIX-Based
Fixed Release: None
Triage Status: None
_______________________________________________________
Details:
case 1:
Makefile :
define EXELNK1
$(1): OBJ1=xOBJ1
$(1): OBJ2=xOBJ2
endef
$(call EXELNK1, utl1)
utl1:;@echo "jfh1:pt1:$(OBJ1):$(OBJ2):"
result of invoking make :
expected: jfh1:pt1:xOBJ1:xOBJ2:
actual:
/bin/sh: -c: line 0: unexpected EOF while looking for matching `"'
/bin/sh: -c: line 1: syntax error: unexpected end of file
make: *** [Makefile:6: utl1] Error 2
case 2:
Makefile:
define EXELNK1
$(1): OBJ1=xOBJ1
endef
$(call EXELNK1, utl1)
utl1:;@echo "jfh1:pt1:$(OBJ1):$(OBJ2):"
result of invoking make : works as expected
case 3:
Makefile:
define EXELNK1
$(1): OBJ2=xOBJ2
endef
$(call EXELNK1, utl1)
utl1:;@echo "jfh1:pt1:$(OBJ1):$(OBJ2):"
result of invoking make : works as expected
_______________________________________________________
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