Follow-up Comment #4, bug #58556 (project make): It is not ineffective! Did you try it?
touch foo.c printf MAKEFLAGS=r | make - foo.o make: *** No rule to make target 'foo.o'. Stop. make foo.o cc -c -o foo.o foo.c The builtin rule is suppressed by MAKEFLAGS, as expected. This doesn't work ONLY when the target is named exactly ".o". But as I said, the point here is not whether MAKEFLAGS=r is effective in principle or not; it is effective whenever it should be and that works fine. If you insist, you can ignore the part of this report that refers to MAKEFLAGS at all, and the bug is still there. Especially the following point: > - There are no prerequisites in the empty directory, so an implicit rule with prerequisites should not be invoked at all, whether the rule is builtin or is actually defined in the main makefile. Neither "make foo" nor "make foo.o" tries to invoke "cc" in any way, only "make .o" does. Matching an implicit rule when its prerequisites are non-existing is in direct contradiction to the manual section 10.8 "Implicit Rule Search Algorithm". So there seems to be an internal rule with *no prerequisites* for a file named ".o" (which I identified as an explicit, not implicit rule, from the "make -d" output). This is the essence of what I am reporting. Everything else is diagnostics, things I tried in order to investigate the circumstances where this manifests in order to be helpful to the people looking into this. Thank you for bearing with me. _______________________________________________________ Reply to this item at: <https://savannah.gnu.org/bugs/?58556> _______________________________________________ Message sent via Savannah https://savannah.gnu.org/