URL: <https://savannah.gnu.org/bugs/?64964>
Summary: GNU Make deletes intermediate targets that are pattern-rule dependancies Group: make Submitter: pablorackham Submitted: sam. 02 déc. 2023 16:42:27 Severity: 3 - Normal Item Group: None Status: None Privacy: Public Assigned to: None Open/Closed: Open Discussion Lock: Any Component Version: None Operating System: None Fixed Release: None Triage Status: None _______________________________________________________ Follow-up Comments: ------------------------------------------------------- Date: sam. 02 déc. 2023 16:42:27 By: Pablo Rackham <pablorackham> Hello all, I believe a GNU Make behavior I just stumbled upon should qualify as a bug, as it completely break the principle of least surprise for the user, as well as the philosophy of the Make tool. *How Make is expected to work:* Usually, targets that are built as dependancies by Make are not deleted. That is even the essence of why Make is useful: if it needs to build some .o object file from .c and .h source files when it is asked to build a binary, it will do so and keep the .o files there for next time to avoid rebuilding them everytime. *Bug reproduction:* This behavior is broken when the specified target uses a %-pattern. See for example this _Makefile_: foo%: foo%.txt cat $< foo%.txt: foo%.sh sh $< > $@ *Expected behavior:* Given this _Makefile_, and how Make is expected to work, I would expect that: * running `make foo1` a first time will run _./foo1.sh_, save its output to _foo1.txt_, and then show the content of _foo1.txt_ ; * running `make foo1` a second time, since the _foo1.txt_ file is already there and since _foo1.sh_ has not been modified since the first run, it should just show the content of _foo1.txt_. *Actual behavior:* Given this _Makefile_, running `make foo1` will run _./foo1.sh_, save its output to _foo1.txt_, then show the content of _foo1.txt_, *and then it will rm _foo1.txt_*. This behavior causes Make to rerun the _.sh_ files to rebuild the _.txt_ files every time. I'm aware of what GNU Make calls "chains", and the documentation explicitely says that intermediate files of _implicit_ chains are deleted (the given example is a .c file that is auto-generated from a .y file), but in my example the chain should not be considered implicit: all the rules are written in the Makefile, they are not default rules that are implicitely there. ----- I'm aware that I can add `.SECONDARY:` to tell Make not to delete intermediate targets, but I believe it should not happen at all with explicitely written rules. Imagine a _Makefile_ that, over time, comes to look like this: foo1: foo1.txt cat $< foo2: foo2.txt cat $< foo3: foo3.txt cat $< ... fooN: fooN.txt cat $< foo%.txt: foo%.sh sh $< > $@ It's only natural to rewrite it as in the example given above to reproduce the undesired behavior. Except that the rewrite, which looks just like a sensical simple refactoring is actually completely changing the behavior. _______________________________________________________ Reply to this item at: <https://savannah.gnu.org/bugs/?64964> _______________________________________________ Message posté via Savannah https://savannah.gnu.org/