> Date: Fri, 21 Sep 2012 15:00:12 +0200 > From: Christian Ehrhardt <open...@c--e.de> > > Hi, > > On Fri, Sep 21, 2012 at 11:53:23AM +0200, Mark Kettenis wrote: > > > there are machines (in particular those based on AMD CPUs) where > > > the APIC-ID of the boot CPU's LAPIC is not zero. Instead APIC-ID zero > > > is apparently assigned to the first IO-APIC. AFAICS we will mis-route > > > MSI interrupts on such a machine. > > > > > > The symptom (apart from MSI interrupts not working) would be a LAPIC > > > error interrupt where the LAPIC complains that there is a interrupt > > > message that noone cares about. > > > > > > Below's a suggested patch for discussion. However, I cannot test it on > > > the critical machines right now. I did verify that it does not break > > > MSIs on a conventional machine, though. > > > > The amd64 codebase already gets this right. While there are > > significant difference in the interrupt handling code between both > > platforms, I do prefer to keep the code as similar as possible. So > > I'd prefer the diff below over yours. > > Fine with me. Let me add that I just verified that on one particular > machine that I have here: > - MSIs do not work with unmodified 5.1 code installed from CD. > - MSIs work with (my version of) the patch applied. > Can you commit this?
Commit... and run.
