> Date: Sun, 31 Mar 2013 13:48:39 +0200
> From: Ralf Horstmann <r...@ackstorm.de>
>
> * Mark Kettenis <mark.kette...@xs4all.nl> [2013-03-31 11:51]:
> > Ralf, Matthieu,
> >
> > Yesterday I committed some changes that fix some issues in the SDVO
> > code. For my setup, whhere HDMI output is provided over SDVO this
> > still isn't enough to give me output. For that I need some further
> > changes. But I'm interested to see if what's now in -current works
> > for you. Could you send me a dmesg from a kernel with DRMDEBUG enabled?
>
> Still doesn't detect the DVI output, but different error messsage now:
Thanks Ralf, looks like your system needs the I2C bit-banging as well.
I committed the necessary code earlier today. Make sure ypou have
revision 1.6 of sys/dev/pci/drm/i915/intel_sdvo.c. If that still
doesn't work, try the attached diff as well.
Index: i2c_bitbang.c
===================================================================
RCS file: /cvs/src/sys/dev/i2c/i2c_bitbang.c,v
retrieving revision 1.3
diff -u -p -r1.3 i2c_bitbang.c
--- i2c_bitbang.c 13 Jan 2006 23:56:46 -0000 1.3
+++ i2c_bitbang.c 31 Mar 2013 17:56:47 -0000
@@ -62,11 +62,11 @@ i2c_bitbang_send_start(void *v, int flag
BB_DIR(OUTPUT);
BB_SET(SDA | SCL);
- delay(5); /* bus free time (4.7 uS) */
+ delay(6); /* bus free time (4.7 uS) */
BB_SET( SCL);
- delay(4); /* start hold time (4.0 uS) */
+ delay(5); /* start hold time (4.0 uS) */
BB_SET( 0);
- delay(5); /* clock low time (4.7 uS) */
+ delay(6); /* clock low time (4.7 uS) */
return (0);
}
@@ -79,7 +79,7 @@ i2c_bitbang_send_stop(void *v, int flags
BB_DIR(OUTPUT);
BB_SET( SCL);
- delay(4); /* stop setup time (4.0 uS) */
+ delay(5); /* stop setup time (4.0 uS) */
BB_SET(SDA | SCL);
return (0);
@@ -115,11 +115,11 @@ i2c_bitbang_read_byte(void *v, uint8_t *
for (i = 0; i < 8; i++) {
val <<= 1;
BB_SET(SDA | SCL);
- delay(4); /* clock high time (4.0 uS) */
+ delay(5); /* clock high time (4.0 uS) */
if (BB_READ & SDA)
val |= 1;
BB_SET(SDA );
- delay(5); /* clock low time (4.7 uS) */
+ delay(6); /* clock low time (4.7 uS) */
}
bit = (flags & I2C_F_LAST) ? SDA : 0;
@@ -127,13 +127,13 @@ i2c_bitbang_read_byte(void *v, uint8_t *
BB_SET(bit );
delay(1); /* data setup time (250 nS) */
BB_SET(bit | SCL);
- delay(4); /* clock high time (4.0 uS) */
+ delay(5); /* clock high time (4.0 uS) */
BB_SET(bit );
- delay(5); /* clock low time (4.7 uS) */
+ delay(6); /* clock low time (4.7 uS) */
BB_DIR(INPUT);
BB_SET(SDA );
- delay(5);
+ delay(6);
if ((flags & (I2C_F_STOP | I2C_F_LAST)) == (I2C_F_STOP | I2C_F_LAST))
(void) i2c_bitbang_send_stop(v, flags, ops);
@@ -157,20 +157,20 @@ i2c_bitbang_write_byte(void *v, uint8_t
BB_SET(bit );
delay(1); /* data setup time (250 nS) */
BB_SET(bit | SCL);
- delay(4); /* clock high time (4.0 uS) */
+ delay(5); /* clock high time (4.0 uS) */
BB_SET(bit );
- delay(5); /* clock low time (4.7 uS) */
+ delay(6); /* clock low time (4.7 uS) */
}
BB_DIR(INPUT);
BB_SET(SDA );
- delay(5);
+ delay(6);
BB_SET(SDA | SCL);
- delay(4);
+ delay(5);
error = (BB_READ & SDA) ? EIO : 0;
BB_SET(SDA );
- delay(5);
+ delay(6);
if (flags & I2C_F_STOP)
(void) i2c_bitbang_send_stop(v, flags, ops);
