I previously sent an email regarding the Areca ARC-1880 on sparc64.
I also have an Areca ARC-1222i 8 Port PCIe RAID card which
I tried with the 7.1 stable release ISO on a SPARC Enterprise T5220.
The card is detected as an Areca ARC-1680, which is odd.
Are Areca cards not meant to work on sparc64?
Tell me if you need more information.
Thanks,
Michael
-> show /HOST
/HOST
Targets:
bootmode
console
diag
domain
tpm
Properties:
autorestart = reset
autorunonerror = false
bootfailrecovery = poweroff
bootrestart = none
boottimeout = 0
hypervisor_version = Hypervisor 1.10.7.i 2017/05/04 15:09
macaddress = 00:21:28:8f:44:ca
maxbootfail = 3
obp_version = OpenBoot 4.33.6.h 2017/05/04 14:22
post_version = POST 4.33.6.h 2017/05/04 14:30
send_break_action = (Cannot show property)
status = Powered off
sysfw_version = Sun System Firmware 7.4.11 2017/05/04 15:31
Commands:
cd
set
show
-> start /SYS
Are you sure you want to start /SYS (y/n)? y
Starting /SYS
-> start /SP/console
Are you sure you want to start /SP/console (y/n)? y
Serial console started. To stop, type #.
\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#2022-07-31
00:50:21.309 0:0:0>
2022-07-31 00:50:21.350 0:0:0>POST 4.33.6.h 2017/05/04 14:30
2022-07-31 00:50:21.428 0:0:0>
2022-07-31 00:50:21.481 0:0:0>Copyright (c) 2017, Oracle and/or its
affiliates. All rights reserved.
2022-07-31 00:50:21.638 0:0:0>vbsc_input_location 000000ff.f0e04c00
2022-07-31 00:50:21.724 0:0:0>POST enabling CMP 0 threads:
ffffffff.ffffffff
2022-07-31 00:50:21.827 0:0:0>VBSC mode is: 00000000.00000001
2022-07-31 00:50:21.916 0:0:0>VBSC level is: 00000000.00000001
2022-07-31 00:50:21.996 0:0:0>VBSC selecting Normal mode, MAX Testing.
2022-07-31 00:50:22.086 0:0:0>VBSC setting verbosity level 3
2022-07-31 00:50:22.163 0:0:0> Niagara2, Version 2.2
2022-07-31 00:50:22.232 0:0:0> Serial Number: 3fdde98e.028234e3
2022-07-31 00:50:23.313 0:0:0> CMP 1582 Mhz
2022-07-31 00:50:23.373 0:0:0>Basic Memory Tests.....
2022-07-31 00:50:23.459 0:0:0>Begin: Branch Sanity Check
2022-07-31 00:50:23.539 0:0:0>End : Branch Sanity Check
2022-07-31 00:50:24.652 0:0:0>Sys 166 MHz, CPU 1582 MHz, Mem 332 MHz
2022-07-31 00:50:24.741 0:0:0>CMP 1582 MHz
2022-07-31 00:50:24.818 0:0:0>L2 Bank EFuse = 00000000.000000ff
2022-07-31 00:50:24.901 0:0:0>L2 Bank status = 00000000.00000f0f
2022-07-31 00:50:24.984 0:0:0>Core available Efuse = ffffffff.ffffffff
2022-07-31 00:50:25.078 0:0:0>Test Memory.....
2022-07-31 00:50:25.147 0:0:0>Begin: Probe and Setup Memory
2022-07-31 00:50:25.228 0:0:0>INFO: 32768MB at Memory Branch 0
2022-07-31 00:50:25.312 0:0:0>INFO: 32768MB at Memory Branch 1
2022-07-31 00:50:25.396 0:0:0>INFO: 32768MB at Memory Branch 2
2022-07-31 00:50:25.478 0:0:0>INFO: 32768MB at Memory Branch 3
2022-07-31 00:50:25.561 0:0:0>
2022-07-31 00:50:25.609 0:0:0>End : Probe and Setup Memory
2022-07-31 00:50:25.691 0:0:0>Setup POST Mailbox .....
2022-07-31 00:50:25.771 0:0:0>Begin: Test Mailbox region
2022-07-31 00:50:25.844 0:0:0>..
2022-07-31 00:50:37.831 0:0:0>End : Test Mailbox region
2022-07-31 00:50:37.913 0:0:0>Begin: Set Mailbox
2022-07-31 00:50:40.744 0:0:0>Master CPU Tests Basic.....
2022-07-31 00:50:40.977 0:0:0>CPU =: 0
2022-07-31 00:50:41.312 0:0:0>Begin: DMMU Registers Access
2022-07-31 00:50:41.674 0:0:0>End : DMMU Registers Access
2022-07-31 00:50:41.817 0:0:0>Begin: IMMU Registers Access
2022-07-31 00:50:42.171 0:0:0>End : IMMU Registers Access
2022-07-31 00:50:42.314 0:0:0>Begin: Common MMU regs
2022-07-31 00:50:42.902 0:0:0>End : Common MMU regs
2022-07-31 00:50:43.227 0:0:0>Init MMU.....
2022-07-31 00:50:49.093 0:0:0>Sys 166 MHz, CPU 1582 MHz, Mem 332 MHz
2022-07-31 00:50:49.241 0:0:0>CMP 1582 MHz
2022-07-31 00:50:49.363 0:0:0>Begin: Setup Final DMMU Entries
2022-07-31 00:50:49.680 0:0:0>End : Setup Final DMMU Entries
2022-07-31 00:50:49.837 0:0:0>Copy POST to memory..
2022-07-31 00:50:58.741 0:0:0>Verifying checksum on copied image.
2022-07-31 00:50:58.883 0:0:0>The Memory's CHECKSUM value is f32.
2022-07-31 00:50:59.026 0:0:0>The Memory's Content Size value is b827a.
2022-07-31 00:51:08.854 0:0:0>Success... Checksum on Memory Validated.
2022-07-31 00:51:08.999 0:0:0>Executing out of memory..
2022-07-31 00:51:09.067 0:0:0>NCU Setup and PIU link train.....
2022-07-31 00:51:09.124 0:0:0>Begin: NCU INIT PCIE Base and Mask Regs.
2022-07-31 00:51:09.344 0:0:0>End : NCU INIT PCIE Base and Mask Regs.
2022-07-31 00:51:09.400 0:0:0>Begin: PIU link train
2022-07-31 00:51:10.908 0:0:0>End : PIU link train
2022-07-31 00:51:10.964 0:0:0>L2 Tests.....
2022-07-31 00:51:11.018 0:0:0>Begin: Setup L2 Cache
2022-07-31 00:51:11.025 0:0:0>End : Setup L2 Cache
2022-07-31 00:51:11.082 0:0:0>Begin: L2 Cache UA Array Test
2022-07-31 00:51:11.200 0:0:0>End : L2 Cache UA Array Test
2022-07-31 00:51:11.256 0:0:0>Begin: L2 Cache VD Array Test
2022-07-31 00:51:11.373 0:0:0>End : L2 Cache VD Array Test
2022-07-31 00:51:11.428 0:0:0>Begin: L2 Cache Tags Test
2022-07-31 00:51:11.640 0:0:0>End : L2 Cache Tags Test
2022-07-31 00:51:11.697 0:0:0>Begin: Scrub and Setup L2 Cache
2022-07-31 00:51:11.803 0:0:0>L2 Scrub VD & UA
2022-07-31 00:51:11.859 0:0:0>L2 Scrub Tags
2022-07-31 00:51:12.004 0:0:0>End : Scrub and Setup L2 Cache
2022-07-31 00:51:12.060 0:0:0>Begin: CMP Cache Ram Test
2022-07-31 00:51:14.893 0:0:0>End : CMP Cache Ram Test
2022-07-31 00:51:14.949 0:0:0>Begin: Enable CMP Cache
2022-07-31 00:51:15.056 0:0:0>Selected mode = 0
2022-07-31 00:51:15.110 0:0:0>L2 Scrub Data
2022-07-31 00:51:15.639 0:0:0>L2 Enable
2022-07-31 00:51:15.744 0:0:0>End : Enable CMP Cache
2022-07-31 00:51:17.104 0:0:0>CPU =: 0 8 16 24 32 40 48 56
2022-07-31 00:51:17.697 0:1:0>Begin: DMMU Registers Access
2022-07-31 00:51:17.702 0:2:0>Begin: DMMU Registers Access
2022-07-31 00:51:17.707 0:3:0>Begin: DMMU Registers Access
2022-07-31 00:51:17.713 0:4:0>Begin: DMMU Registers Access
2022-07-31 00:51:17.722 0:5:0>Begin: DMMU Registers Access
2022-07-31 00:51:17.726 0:6:0>Begin: DMMU Registers Access
2022-07-31 00:51:17.731 0:7:0>Begin: DMMU Registers Access
2022-07-31 00:51:17.753 0:1:0>End : DMMU Registers Access
2022-07-31 00:51:17.757 0:2:0>End : DMMU Registers Access
2022-07-31 00:51:17.762 0:3:0>End : DMMU Registers Access
2022-07-31 00:51:17.767 0:4:0>End : DMMU Registers Access
2022-07-31 00:51:17.771 0:5:0>End : DMMU Registers Access
2022-07-31 00:51:17.776 0:6:0>End : DMMU Registers Access
2022-07-31 00:51:17.781 0:7:0>End : DMMU Registers Access
2022-07-31 00:51:17.786 0:1:0>Begin: IMMU Registers Access
2022-07-31 00:51:17.790 0:2:0>Begin: IMMU Registers Access
2022-07-31 00:51:17.794 0:3:0>Begin: IMMU Registers Access
2022-07-31 00:51:17.799 0:4:0>Begin: IMMU Registers Access
2022-07-31 00:51:17.804 0:5:0>Begin: IMMU Registers Access
2022-07-31 00:51:17.808 0:6:0>Begin: IMMU Registers Access
2022-07-31 00:51:17.813 0:7:0>Begin: IMMU Registers Access
2022-07-31 00:51:17.835 0:1:0>End : IMMU Registers Access
2022-07-31 00:51:17.839 0:2:0>End : IMMU Registers Access
2022-07-31 00:51:17.844 0:3:0>End : IMMU Registers Access
2022-07-31 00:51:17.848 0:4:0>End : IMMU Registers Access
2022-07-31 00:51:17.853 0:5:0>End : IMMU Registers Access
2022-07-31 00:51:17.862 0:6:0>End : IMMU Registers Access
2022-07-31 00:51:17.867 0:7:0>End : IMMU Registers Access
2022-07-31 00:51:17.871 0:1:0>Begin: Common MMU regs
2022-07-31 00:51:17.876 0:2:0>Begin: Common MMU regs
2022-07-31 00:51:17.881 0:3:0>Begin: Common MMU regs
2022-07-31 00:51:17.886 0:4:0>Begin: Common MMU regs
2022-07-31 00:51:17.889 0:5:0>Begin: Common MMU regs
2022-07-31 00:51:17.893 0:6:0>Begin: Common MMU regs
2022-07-31 00:51:17.897 0:7:0>Begin: Common MMU regs
2022-07-31 00:51:17.917 0:1:0>End : Common MMU regs
2022-07-31 00:51:17.921 0:2:0>End : Common MMU regs
2022-07-31 00:51:17.927 0:3:0>End : Common MMU regs
2022-07-31 00:51:17.932 0:4:0>End : Common MMU regs
2022-07-31 00:51:17.936 0:5:0>End : Common MMU regs
2022-07-31 00:51:17.940 0:6:0>End : Common MMU regs
2022-07-31 00:51:17.946 0:7:0>End : Common MMU regs
2022-07-31 00:51:18.483 0:0:0>Extended CPU Tests.....
2022-07-31 00:51:18.489 0:1:0>Begin: D-Cache RAM
2022-07-31 00:51:18.495 0:2:0>Begin: D-Cache RAM
2022-07-31 00:51:18.501 0:3:0>Begin: D-Cache RAM
2022-07-31 00:51:18.505 0:4:0>Begin: D-Cache RAM
2022-07-31 00:51:18.509 0:5:0>Begin: D-Cache RAM
2022-07-31 00:51:18.513 0:6:0>Begin: D-Cache RAM
2022-07-31 00:51:18.518 0:7:0>Begin: D-Cache RAM
2022-07-31 00:51:18.542 0:1:0>End : D-Cache RAM
2022-07-31 00:51:18.546 0:2:0>End : D-Cache RAM
2022-07-31 00:51:18.550 0:3:0>End : D-Cache RAM
2022-07-31 00:51:18.554 0:4:0>End : D-Cache RAM
2022-07-31 00:51:18.563 0:5:0>End : D-Cache RAM
2022-07-31 00:51:18.567 0:6:0>End : D-Cache RAM
2022-07-31 00:51:18.571 0:7:0>End : D-Cache RAM
2022-07-31 00:51:18.577 0:1:0>Begin: D-Cache Tags
2022-07-31 00:51:18.581 0:2:0>Begin: D-Cache Tags
2022-07-31 00:51:18.586 0:3:0>Begin: D-Cache Tags
2022-07-31 00:51:18.590 0:4:0>Begin: D-Cache Tags
2022-07-31 00:51:18.593 0:5:0>Begin: D-Cache Tags
2022-07-31 00:51:18.598 0:6:0>Begin: D-Cache Tags
2022-07-31 00:51:18.602 0:7:0>Begin: D-Cache Tags
2022-07-31 00:51:18.606 0:0:0>Begin: D-Cache RAM
2022-07-31 00:51:18.629 0:1:0>End : D-Cache Tags
2022-07-31 00:51:18.633 0:2:0>End : D-Cache Tags
2022-07-31 00:51:18.637 0:3:0>End : D-Cache Tags
2022-07-31 00:51:18.641 0:4:0>End : D-Cache Tags
2022-07-31 00:51:18.646 0:5:0>End : D-Cache Tags
2022-07-31 00:51:18.651 0:6:0>End : D-Cache Tags
2022-07-31 00:51:18.656 0:7:0>End : D-Cache Tags
2022-07-31 00:51:18.660 0:0:0>End : D-Cache RAM
2022-07-31 00:51:18.664 0:1:0>Begin: I-Cache RAM Test
2022-07-31 00:51:18.667 0:2:0>Begin: I-Cache RAM Test
2022-07-31 00:51:18.671 0:3:0>Begin: I-Cache RAM Test
2022-07-31 00:51:18.676 0:4:0>Begin: I-Cache RAM Test
2022-07-31 00:51:18.680 0:5:0>Begin: I-Cache RAM Test
2022-07-31 00:51:18.684 0:6:0>Begin: I-Cache RAM Test
2022-07-31 00:51:18.689 0:7:0>Begin: I-Cache RAM Test
2022-07-31 00:51:18.693 0:0:0>Begin: D-Cache Tags
2022-07-31 00:51:18.769 0:0:0>End : D-Cache Tags
2022-07-31 00:51:18.773 0:1:0>End : I-Cache RAM Test
2022-07-31 00:51:18.778 0:2:0>End : I-Cache RAM Test
2022-07-31 00:51:18.782 0:3:0>End : I-Cache RAM Test
2022-07-31 00:51:18.787 0:4:0>End : I-Cache RAM Test
2022-07-31 00:51:18.792 0:5:0>End : I-Cache RAM Test
2022-07-31 00:51:18.796 0:6:0>End : I-Cache RAM Test
2022-07-31 00:51:18.801 0:7:0>End : I-Cache RAM Test
2022-07-31 00:51:18.806 0:0:0>Begin: I-Cache RAM Test
2022-07-31 00:51:18.811 0:1:0>Begin: I-Cache Tag RAM
2022-07-31 00:51:18.816 0:2:0>Begin: I-Cache Tag RAM
2022-07-31 00:51:18.820 0:3:0>Begin: I-Cache Tag RAM
2022-07-31 00:51:18.826 0:4:0>Begin: I-Cache Tag RAM
2022-07-31 00:51:18.830 0:5:0>Begin: I-Cache Tag RAM
2022-07-31 00:51:18.841 0:6:0>Begin: I-Cache Tag RAM
2022-07-31 00:51:18.846 0:7:0>Begin: I-Cache Tag RAM
2022-07-31 00:51:18.870 0:1:0>End : I-Cache Tag RAM
2022-07-31 00:51:18.874 0:2:0>End : I-Cache Tag RAM
2022-07-31 00:51:18.878 0:3:0>End : I-Cache Tag RAM
2022-07-31 00:51:18.883 0:4:0>End : I-Cache Tag RAM
2022-07-31 00:51:18.886 0:5:0>End : I-Cache Tag RAM
2022-07-31 00:51:18.891 0:6:0>End : I-Cache Tag RAM
2022-07-31 00:51:18.895 0:7:0>End : I-Cache Tag RAM
2022-07-31 00:51:18.900 0:0:0>End : I-Cache RAM Test
2022-07-31 00:51:18.912 0:0:0>Begin: I-Cache Tag RAM
2022-07-31 00:51:18.944 0:0:0>End : I-Cache Tag RAM
2022-07-31 00:51:29.556 0:0:0>CPU =: 0-63
2022-07-31 00:51:29.711 0:0:0>Test slave strand registers...
2022-07-31 00:51:37.088 0:0:0>Scrub Memory.....
2022-07-31 00:51:37.143 0:0:0>Begin: Scrub Memory
2022-07-31 00:51:37.271 0:0:0>Scrub 00000000.10000000->00000020.00000000
2022-07-31 00:51:52.794 0:0:0>End : Scrub Memory
2022-07-31 00:51:53.126 0:0:0>SPU CWQ Tests...
2022-07-31 00:51:53.506 0:0:0>MAU Tests...
2022-07-31 00:51:53.929 0:1:0>Begin: FPU Registers and Data Path
2022-07-31 00:51:53.992 0:2:0>Begin: FPU Registers and Data Path
2022-07-31 00:51:54.045 0:3:0>Begin: FPU Registers and Data Path
2022-07-31 00:51:54.086 0:4:0>Begin: FPU Registers and Data Path
2022-07-31 00:51:54.127 0:5:0>Begin: FPU Registers and Data Path
2022-07-31 00:51:54.169 0:6:0>Begin: FPU Registers and Data Path
2022-07-31 00:51:54.211 0:7:0>Begin: FPU Registers and Data Path
2022-07-31 00:51:54.491 0:0:0>Begin: FPU Registers and Data Path
2022-07-31 00:51:54.765 0:1:0>End : FPU Registers and Data Path
2022-07-31 00:51:54.809 0:2:0>End : FPU Registers and Data Path
2022-07-31 00:51:54.852 0:3:0>End : FPU Registers and Data Path
2022-07-31 00:51:54.899 0:4:0>End : FPU Registers and Data Path
2022-07-31 00:51:54.942 0:5:0>End : FPU Registers and Data Path
2022-07-31 00:51:54.984 0:6:0>End : FPU Registers and Data Path
2022-07-31 00:51:55.026 0:7:0>End : FPU Registers and Data Path
2022-07-31 00:51:55.100 0:1:0>Begin: FPU Move Registers
2022-07-31 00:51:55.140 0:2:0>Begin: FPU Move Registers
2022-07-31 00:51:55.177 0:3:0>Begin: FPU Move Registers
2022-07-31 00:51:55.216 0:4:0>Begin: FPU Move Registers
2022-07-31 00:51:55.255 0:5:0>Begin: FPU Move Registers
2022-07-31 00:51:55.295 0:6:0>Begin: FPU Move Registers
2022-07-31 00:51:55.333 0:7:0>Begin: FPU Move Registers
2022-07-31 00:51:55.375 0:0:0>End : FPU Registers and Data Path
2022-07-31 00:51:55.633 0:0:0>Begin: FPU Move Registers
2022-07-31 00:51:57.398 0:1:0>End : FPU Move Registers
2022-07-31 00:51:57.596 0:2:0>End : FPU Move Registers
2022-07-31 00:51:57.686 0:3:0>End : FPU Move Registers
2022-07-31 00:51:57.745 0:4:0>End : FPU Move Registers
2022-07-31 00:51:57.785 0:5:0>End : FPU Move Registers
2022-07-31 00:51:57.826 0:6:0>End : FPU Move Registers
2022-07-31 00:51:57.871 0:7:0>End : FPU Move Registers
2022-07-31 00:51:57.958 0:1:0>Begin: FSR Read/Write
2022-07-31 00:51:58.104 0:2:0>Begin: FSR Read/Write
2022-07-31 00:51:58.439 0:3:0>Begin: FSR Read/Write
2022-07-31 00:51:58.895 0:4:0>Begin: FSR Read/Write
2022-07-31 00:51:59.630 0:5:0>Begin: FSR Read/Write
2022-07-31 00:52:00.288 0:6:0>Begin: FSR Read/Write
2022-07-31 00:52:01.022 0:7:0>Begin: FSR Read/Write
2022-07-31 00:52:01.830 0:0:0>End : FPU Move Registers
2022-07-31 00:52:03.192 0:0:0>Begin: FSR Read/Write
2022-07-31 00:52:05.789 0:1:0>End : FSR Read/Write
2022-07-31 00:52:05.879 0:2:0>End : FSR Read/Write
2022-07-31 00:52:05.959 0:3:0>End : FSR Read/Write
2022-07-31 00:52:06.036 0:4:0>End : FSR Read/Write
2022-07-31 00:52:06.111 0:5:0>End : FSR Read/Write
2022-07-31 00:52:06.306 0:6:0>End : FSR Read/Write
2022-07-31 00:52:06.400 0:7:0>End : FSR Read/Write
2022-07-31 00:52:06.455 0:1:0>Begin: FPU Branch Instructions
2022-07-31 00:52:06.461 0:2:0>Begin: FPU Branch Instructions
2022-07-31 00:52:06.465 0:3:0>Begin: FPU Branch Instructions
2022-07-31 00:52:06.474 0:4:0>Begin: FPU Branch Instructions
2022-07-31 00:52:06.478 0:5:0>Begin: FPU Branch Instructions
2022-07-31 00:52:06.483 0:6:0>Begin: FPU Branch Instructions
2022-07-31 00:52:06.487 0:7:0>Begin: FPU Branch Instructions
2022-07-31 00:52:06.492 0:0:0>End : FSR Read/Write
2022-07-31 00:52:06.514 0:0:0>Begin: FPU Branch Instructions
2022-07-31 00:52:06.680 0:0:0>End : FPU Branch Instructions
2022-07-31 00:52:06.684 0:1:0>End : FPU Branch Instructions
2022-07-31 00:52:06.688 0:2:0>End : FPU Branch Instructions
2022-07-31 00:52:06.693 0:3:0>End : FPU Branch Instructions
2022-07-31 00:52:06.697 0:4:0>End : FPU Branch Instructions
2022-07-31 00:52:06.702 0:5:0>End : FPU Branch Instructions
2022-07-31 00:52:06.708 0:6:0>End : FPU Branch Instructions
2022-07-31 00:52:06.713 0:7:0>End : FPU Branch Instructions
2022-07-31 00:52:06.719 0:0:0>Begin: FPU Functional Test
2022-07-31 00:52:06.722 0:1:0>Begin: FPU Functional Test
2022-07-31 00:52:06.727 0:2:0>Begin: FPU Functional Test
2022-07-31 00:52:06.732 0:3:0>Begin: FPU Functional Test
2022-07-31 00:52:06.738 0:4:0>Begin: FPU Functional Test
2022-07-31 00:52:06.742 0:5:0>Begin: FPU Functional Test
2022-07-31 00:52:06.752 0:6:0>Begin: FPU Functional Test
2022-07-31 00:52:06.757 0:7:0>Begin: FPU Functional Test
2022-07-31 00:52:07.803 0:0:0>End : FPU Functional Test
2022-07-31 00:52:07.808 0:1:0>End : FPU Functional Test
2022-07-31 00:52:07.812 0:2:0>End : FPU Functional Test
2022-07-31 00:52:07.817 0:3:0>End : FPU Functional Test
2022-07-31 00:52:07.821 0:4:0>End : FPU Functional Test
2022-07-31 00:52:07.826 0:5:0>End : FPU Functional Test
2022-07-31 00:52:07.831 0:6:0>End : FPU Functional Test
2022-07-31 00:52:07.836 0:7:0>End : FPU Functional Test
2022-07-31 00:52:07.901 0:0:0>Begin: PIU INT init test
2022-07-31 00:52:08.112 0:0:0>End : PIU INT init test
2022-07-31 00:52:08.166 0:0:0>Begin: PIU MSI init test
2022-07-31 00:52:08.381 0:0:0>End : PIU MSI init test
2022-07-31 00:52:08.434 0:0:0>Begin: PIU ILU init test
2022-07-31 00:52:08.640 0:0:0>End : PIU ILU init test
2022-07-31 00:52:08.693 0:0:0>Begin: PIU TLU init test
2022-07-31 00:52:08.901 0:0:0>End : PIU TLU init test
2022-07-31 00:52:08.954 0:0:0>Begin: PIU PEU init test
2022-07-31 00:52:09.161 0:0:0>End : PIU PEU init test
2022-07-31 00:52:09.276 0:0:0>Begin: PIU intx interrupt test
2022-07-31 00:52:09.436 0:0:0>cpu_interrupt_handler, I/O interrupt.
2022-07-31 00:52:09.578 0:0:0>End : PIU intx interrupt test
2022-07-31 00:52:09.733 0:0:0>Begin: Probe PCI Devices
2022-07-31 00:52:19.578 0:0:0>PCIE PROBE devices found = 25
2022-07-31 00:52:19.769 0:0:0>End : Probe PCI Devices
2022-07-31 00:52:19.823 0:0:0>Begin: PIU PCI id test
2022-07-31 00:52:20.081 0:0:0>End : PIU PCI id test
2022-07-31 00:52:20.135 0:0:0>Begin: Network Tests
2022-07-31 00:52:20.296 0:0:0>Testing Network Device: NIU(s) [CMP0 ] ...
2022-07-31 00:52:20.505 0:0:0>Network Interface Unit Port 0 Tests ...
2022-07-31 00:52:34.830 0:0:0>Network Interface Unit Port 1 Tests ...
2022-07-31 00:52:49.208 0:0:0>Begin: XMAC Loopback - Port 0
2022-07-31 00:52:51.686 0:0:0>End : XMAC Loopback - Port 0
2022-07-31 00:52:51.741 0:0:0>Begin: XPCS Loopback - Port 0
2022-07-31 00:52:54.217 0:0:0>End : XPCS Loopback - Port 0
2022-07-31 00:52:54.271 0:0:0>Begin: SerDes Loopback - Port 0
2022-07-31 00:52:58.820 0:0:0>End : SerDes Loopback - Port 0
2022-07-31 00:52:58.874 0:0:0>Begin: XMAC Loopback - Port 1
2022-07-31 00:53:01.354 0:0:0>End : XMAC Loopback - Port 1
2022-07-31 00:53:01.408 0:0:0>Begin: XPCS Loopback - Port 1
2022-07-31 00:53:03.887 0:0:0>End : XPCS Loopback - Port 1
2022-07-31 00:53:03.941 0:0:0>Begin: SerDes Loopback - Port 1
2022-07-31 00:53:08.492 0:0:0>End : SerDes Loopback - Port 1
2022-07-31 00:53:08.652 0:0:0>End : Network Tests
2022-07-31 00:53:08.776 0:0:0>Functional CPU Tests.....
2022-07-31 00:53:08.939 0:0:0>Extended Memory Tests.....
2022-07-31 00:53:08.995 0:0:0>Begin: Print Mem Config
2022-07-31 00:53:09.018 0:0:0>Caches : Icache is ON, Dcache is ON.
2022-07-31 00:53:09.023 0:0:0> Total Memory = 00000000.00000000 ->
00000020.00000000
2022-07-31 00:53:09.029 0:0:0>End : Print Mem Config
2022-07-31 00:53:09.084 0:0:0>Begin: Block Mem Test
2022-07-31 00:53:09.212 0:0:0>Block Mem Test
00000000.10000000->00000020.00000000
2022-07-31 00:53:09.860 0:0:0>........
2022-07-31 01:00:53.100 0:0:0>Testing Gaps..
2022-07-31 01:00:53.154 0:0:0>........
2022-07-31 01:01:01.702 0:0:0>........
2022-07-31 01:01:10.167 0:0:0>........
2022-07-31 01:01:19.862 0:0:0>End : Block Mem Test
2022-07-31 01:01:19.942 0:0:0>INFO:
2022-07-31 01:01:19.996 0:0:0> POST Passed all devices.
2022-07-31 01:01:20.050 0:0:0>POST: Return to VBSC.
2022-07-31 01:01:20.104 0:0:0>Master set ACK for vbsc runpost command
and spin...
\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-##
SPARC Enterprise T5220, No Keyboard
Copyright (c) 1998, 2017, Oracle and/or its affiliates. All rights reserved.
OpenBoot 4.33.6.h, 130944 MB memory available, Serial #93275338.
Ethernet address 0:21:28:8f:44:ca, Host ID: 858f44ca.
ERROR: boot-read fail
Boot device: net File and args: bsd
Timed out waiting for Autonegotation to complete
Check cable and try again
Link Down
Timed out waiting for Autonegotation to complete
Check cable and try again
Link Down
Timed out waiting for Autonegotation to complete
Check cable and try again
Link Down
Timed out waiting for Autonegotation to complete
Check cable and try again
Link Down
ERROR: boot-read fail
Evaluating:
Can't open boot device
{0} ok boot cdrom
Boot device:
/pci@0/pci@0/pci@1/pci@0/pci@1/pci@0/usb@0,2/hub@4/device@4/storage@0/disk@0:f
File and args: bsd
OpenBSD IEEE 1275 Bootblock 2.1
..>> OpenBSD BOOT 1.22
ERROR: /iscsi-hba: No iscsi-network-bootpath property
|#/#-#\#|#/#-#\#Booting
/pci@0/pci@0/pci@1/pci@0/pci@1/pci@0/usb@0,2/hub@4/device@4/storage@0/disk@0,0:f/bsd
4148464@0x1000000|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#+4880@0x13f4cf0|#+3238644@0x1c00000/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#+955660@0x1f16af4|#
/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#symbols
@ 0xfeaec3c0
155|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#|#/#-#\#+312+28
start=0x1000000
console is /virtual-devices@100/console@1
Copyright (c) 1982, 1986, 1989, 1991, 1993
The Regents of the University of California. All rights reserved.
Copyright (c) 1995-2022 OpenBSD. All rights reserved.
https://www.OpenBSD.org
OpenBSD 7.1 (RAMDISK) #1206: Mon Apr 11 22:22:30 MDT 2022
dera...@sparc64.openbsd.org:/usr/src/sys/arch/sparc64/compile/RAMDISK
real mem = 137304735744 (130944MB)
avail mem = 134912024576 (128662MB)
random: boothowto does not indicate good seed
mainbus0 at root: SPARC Enterprise T5220
cpu0 at mainbus0: SUNW,UltraSPARC-T2 (rev 0.0) @ 1581.586 MHz
"SUNW,UltraSPARC-T2" at mainbus0 not configured
"SUNW,UltraSPARC-T2" at mainbus0 not configured
"SUNW,UltraSPARC-T2" at mainbus0 not configured
"SUNW,UltraSPARC-T2" at mainbus0 not configured
"SUNW,UltraSPARC-T2" at mainbus0 not configured
"SUNW,UltraSPARC-T2" at mainbus0 not configured
"SUNW,UltraSPARC-T2" at mainbus0 not configured
"SUNW,UltraSPARC-T2" at mainbus0 not configured
"SUNW,UltraSPARC-T2" at mainbus0 not configured
"SUNW,UltraSPARC-T2" at mainbus0 not configured
"SUNW,UltraSPARC-T2" at mainbus0 not configured
"SUNW,UltraSPARC-T2" at mainbus0 not configured
"SUNW,UltraSPARC-T2" at mainbus0 not configured
"SUNW,UltraSPARC-T2" at mainbus0 not configured
"SUNW,UltraSPARC-T2" at mainbus0 not configured
"SUNW,UltraSPARC-T2" at mainbus0 not configured
"SUNW,UltraSPARC-T2" at mainbus0 not configured
"SUNW,UltraSPARC-T2" at mainbus0 not configured
"SUNW,UltraSPARC-T2" at mainbus0 not configured
"SUNW,UltraSPARC-T2" at mainbus0 not configured
"SUNW,UltraSPARC-T2" at mainbus0 not configured
"SUNW,UltraSPARC-T2" at mainbus0 not configured
"SUNW,UltraSPARC-T2" at mainbus0 not configured
"SUNW,UltraSPARC-T2" at mainbus0 not configured
"SUNW,UltraSPARC-T2" at mainbus0 not configured
"SUNW,UltraSPARC-T2" at mainbus0 not configured
"SUNW,UltraSPARC-T2" at mainbus0 not configured
"SUNW,UltraSPARC-T2" at mainbus0 not configured
"SUNW,UltraSPARC-T2" at mainbus0 not configured
"SUNW,UltraSPARC-T2" at mainbus0 not configured
"SUNW,UltraSPARC-T2" at mainbus0 not configured
"SUNW,UltraSPARC-T2" at mainbus0 not configured
"SUNW,UltraSPARC-T2" at mainbus0 not configured
"SUNW,UltraSPARC-T2" at mainbus0 not configured
"SUNW,UltraSPARC-T2" at mainbus0 not configured
"SUNW,UltraSPARC-T2" at mainbus0 not configured
"SUNW,UltraSPARC-T2" at mainbus0 not configured
"SUNW,UltraSPARC-T2" at mainbus0 not configured
"SUNW,UltraSPARC-T2" at mainbus0 not configured
"SUNW,UltraSPARC-T2" at mainbus0 not configured
"SUNW,UltraSPARC-T2" at mainbus0 not configured
"SUNW,UltraSPARC-T2" at mainbus0 not configured
"SUNW,UltraSPARC-T2" at mainbus0 not configured
"SUNW,UltraSPARC-T2" at mainbus0 not configured
"SUNW,UltraSPARC-T2" at mainbus0 not configured
"SUNW,UltraSPARC-T2" at mainbus0 not configured
"SUNW,UltraSPARC-T2" at mainbus0 not configured
"SUNW,UltraSPARC-T2" at mainbus0 not configured
"SUNW,UltraSPARC-T2" at mainbus0 not configured
"SUNW,UltraSPARC-T2" at mainbus0 not configured
"SUNW,UltraSPARC-T2" at mainbus0 not configured
"SUNW,UltraSPARC-T2" at mainbus0 not configured
"SUNW,UltraSPARC-T2" at mainbus0 not configured
"SUNW,UltraSPARC-T2" at mainbus0 not configured
"SUNW,UltraSPARC-T2" at mainbus0 not configured
"SUNW,UltraSPARC-T2" at mainbus0 not configured
"SUNW,UltraSPARC-T2" at mainbus0 not configured
"SUNW,UltraSPARC-T2" at mainbus0 not configured
"SUNW,UltraSPARC-T2" at mainbus0 not configured
"SUNW,UltraSPARC-T2" at mainbus0 not configured
"SUNW,UltraSPARC-T2" at mainbus0 not configured
"SUNW,UltraSPARC-T2" at mainbus0 not configured
"SUNW,UltraSPARC-T2" at mainbus0 not configured
vbus0 at mainbus0
"flashprom" at vbus0 not configured
"tpm" at vbus0 not configured
cbus0 at vbus0
"virtual-channel" at cbus0 not configured
"virtual-channel-client" at cbus0 not configured
"virtual-channel" at cbus0 not configured
"virtual-channel-client" at cbus0 not configured
"virtual-domain-service" at cbus0 not configured
"n2cp" at vbus0 not configured
"ncp" at vbus0 not configured
vrng0 at vbus0
vcons0 at vbus0: ivec 0x111: console
vrtc0 at vbus0
vpci0 at mainbus0: bus 2 to 18, dvma map 80000000-ffffffff
pci0 at vpci0
ppb0 at pci0 dev 0 function 0 "PLX PEX 8533" rev 0xaa
pci1 at ppb0 bus 3
ppb1 at pci1 dev 1 function 0 "PLX PEX 8533" rev 0xaa
pci2 at ppb1 bus 4
ppb2 at pci2 dev 0 function 0 "PLX PEX 8517" rev 0xac
pci3 at ppb2 bus 5
ppb3 at pci3 dev 1 function 0 "PLX PEX 8517" rev 0xac
pci4 at ppb3 bus 6
ppb4 at pci4 dev 0 function 0 "PLX PEX 8112" rev 0xaa
pci5 at ppb4 bus 7
ohci0 at pci5 dev 0 function 0 "NEC USB" rev 0x43: ivec 0x16, version 1.0
ohci1 at pci5 dev 0 function 1 "NEC USB" rev 0x43: ivec 0x17, version 1.0
ehci0 at pci5 dev 0 function 2 "NEC USB" rev 0x04: ivec 0x14
usb0 at ehci0: USB revision 2.0
uhub0 at usb0 configuration 1 interface 0 "NEC EHCI root hub" rev
2.00/1.00 addr 1
usb1 at ohci0: USB revision 1.0
uhub1 at usb1 configuration 1 interface 0 "NEC OHCI root hub" rev
1.00/1.00 addr 1
usb2 at ohci1: USB revision 1.0
uhub2 at usb2 configuration 1 interface 0 "NEC OHCI root hub" rev
1.00/1.00 addr 1
ppb5 at pci3 dev 2 function 0 "PLX PEX 8517" rev 0xac
pci6 at ppb5 bus 8
em0 at pci6 dev 0 function 0 "Intel 82571EB" rev 0x06: ivec 0x17,
address 00:21:28:8f:44:ca
em1 at pci6 dev 0 function 1 "Intel 82571EB" rev 0x06: ivec 0x14,
address 00:21:28:8f:44:cb
ppb6 at pci3 dev 3 function 0 "PLX PEX 8517" rev 0xaa
pci7 at ppb6 bus 9
em2 at pci7 dev 0 function 0 "Intel 82571EB" rev 0x06: ivec 0x14,
address 00:21:28:8f:44:cc
em3 at pci7 dev 0 function 1 "Intel 82571EB" rev 0x06: ivec 0x15,
address 00:21:28:8f:44:cd
ppb7 at pci1 dev 2 function 0 "PLX PEX 8533" rev 0xaa
pci8 at ppb7 bus 10
mpi0 at pci8 dev 0 function 0 "Symbios Logic SAS1068E" rev 0x04: msi
mpi0: UNUSED, firmware 1.27.2.0
scsibus0 at mpi0: 112 targets
ppb8 at pci1 dev 8 function 0 "PLX PEX 8533" rev 0xaa
pci9 at ppb8 bus 11
ppb9 at pci9 dev 0 function 0 "PLX PEX 8533" rev 0xaa
pci10 at ppb9 bus 12
ppb10 at pci10 dev 1 function 0 "PLX PEX 8533" rev 0xaa: msi
pci11 at ppb10 bus 13
ppb11 at pci10 dev 2 function 0 "PLX PEX 8533" rev 0xaa: msi
pci12 at ppb11 bus 14
ppb12 at pci10 dev 8 function 0 "PLX PEX 8533" rev 0xaa: msi
pci13 at ppb12 bus 15
arc0 at pci13 dev 0 function 0 "Areca ARC-1680" rev 0x00: ivec 0x14
panic: trap type 0x34 (mem address not aligned): pc=12176c4 npc=12176c8
pstate=44800016<PEF,PRIV,IE>
halted
Program terminated
{0} ok
Serial console stopped.
