On Fri, Apr 03, 2026 at 09:15:51AM +0200, Rafael Sadowski wrote:
> As an alternative to my AMD T14, I have an Intel X13 Gen 5 here.
> Unfortunately, the DRM isn't working. Is this a bug, or do we not
> support this GPU?
> 
> drm:pid0:ct_send *ERROR* [drm] *ERROR* GT0: GUC: CT: No response for request 
> 0x550a (fence 7)
> drm:pid0:intel_guc_ct_send *ERROR* [drm] *ERROR* GT0: GUC: CT: Sending action 
> 0x550a failed (0xffffffffffffffc4e) status=0
> drm:pid0:guc_init_engine_stats *ERROR* [drm] *ERROR* GT0: GUC: Failed to 
> enable usage stats: 0xffffffffffffffc4e
> drm:pid0:__uc_init_hw *ERROR* [drm] *ERROR* GT0: GuC initialization failed 
> 0xffffffffffffffc4e
> drm:pid0:intel_gt_init_hw *ERROR* [drm] *ERROR* GT0: Enabling uc failed (-5)
> drm:pid0:intel_gt_resume *ERROR* [drm] *ERROR* GT0: Failed to initialize GPU, 
> declaring it wedged!
> drm:pid0:add_taint_for_CI *NOTICE* [drm] CI tainted: 0x1 by 
> 0xffffffff81561a3bS
> inteldrm0: 1920x1200, 32bpp

I have not seen that on T14 Gen 5 Intel recently.

Just the expected
drm:pid96554:gsc_work *ERROR* [drm] *ERROR* GT1: GSC proxy handler failed to 
init
as there is no mei driver

GuC TLB invalidation gets sequence numbers with the cyclic xarray
interface.  The current code allocates ids from the start of the range
instead of resuming where it left of.  Having added a related cyclic
function for idr recently, I am curious if this helps:

Index: sys/dev/pci/drm/drm_linux.c
===================================================================
RCS file: /cvs/src/sys/dev/pci/drm/drm_linux.c,v
diff -u -p -r1.135 drm_linux.c
--- sys/dev/pci/drm/drm_linux.c 7 Apr 2026 09:11:15 -0000       1.135
+++ sys/dev/pci/drm/drm_linux.c 13 Apr 2026 07:44:24 -0000
@@ -1066,7 +1066,7 @@ xa_destroy(struct xarray *xa)
        }
 }
 
-/* Don't wrap ids. */
+/* [start, end] Don't wrap ids. */
 int
 __xa_alloc(struct xarray *xa, u32 *id, void *entry, struct xarray_range xr,
     gfp_t gfp)
@@ -1106,18 +1106,51 @@ __xa_alloc(struct xarray *xa, u32 *id, v
        return 0;
 }
 
-/*
- * Wrap ids and store next id.
- * We walk the entire tree so don't special case wrapping.
- * The only caller of this (i915_drm_client.c) doesn't use next id.
- */
+/* [start, end] Wrap ids and store next id. */
 int
 __xa_alloc_cyclic(struct xarray *xa, u32 *id, void *entry,
     struct xarray_range xr, u32 *next, gfp_t gfp)
 {
-       int r = __xa_alloc(xa, id, entry, xr, gfp);
-       *next = *id + 1;
-       return r;
+       struct xarray_entry *xid;
+       uint32_t start = xr.start;
+       uint32_t end = xr.end;
+
+       if (start == 0 && (xa->xa_flags & XA_FLAGS_ALLOC1))
+               start = 1;
+
+       if (gfp & GFP_NOWAIT) {
+               xid = pool_get(&xa_pool, PR_NOWAIT);
+       } else {
+               mtx_leave(&xa->xa_lock);
+               xid = pool_get(&xa_pool, PR_WAITOK);
+               mtx_enter(&xa->xa_lock);
+       }
+
+       if (xid == NULL)
+               return -ENOMEM;
+
+       if (*next < start)
+               xid->id = start;
+       else
+               xid->id = *next;
+
+       while (SPLAY_INSERT(xarray_tree, &xa->xa_tree, xid)) {
+               if (xid->id == end) {
+                       xid->id = start;
+               } else if (xid->id == *next) {
+                       pool_put(&xa_pool, xid);
+                       return -EBUSY;
+               } else {
+                       xid->id++;
+               }
+       }
+       xid->ptr = entry;
+       if (xid->id == end)
+               *next = start;
+       else
+               *next = xid->id + 1;
+       *id = xid->id;
+       return 0;
 }
 
 void *

Reply via email to