#3785: Add RISC-V BSP with support for the Freedom E310 Arty A7 FPGA -------------------------------------------+--------------------- Reporter: pragnesh | Owner: (none) Type: task | Status: new Priority: normal | Milestone: 5.1 Component: arch/riscv | Version: 5 Severity: normal | Resolution: Keywords: #RISCV, #FREEDOME310, #ARTYA7 | Blocked By: Blocking: | -------------------------------------------+---------------------
Comment (by Pragnesh Patel <pragnesh.patel@…>): In [changeset:"f0864b3835de4f6336f06c1cefc2fbc38692166b/rtems-docs" f0864b3/rtems-docs]: {{{ #!CommitTicketReference repository="rtems-docs" revision="f0864b3835de4f6336f06c1cefc2fbc38692166b" user: Add frdme310arty BSP varient Signed-off-by: Pragnesh Patel <pragnesh.pa...@sifive.com> Update #3785. }}} -- Ticket URL: <http://devel.rtems.org/ticket/3785#comment:8> RTEMS Project <http://www.rtems.org/> RTEMS Project
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