Mohammed Anees created an issue: https://gitlab.rtems.org/rtems/rtos/rtems/-/issues/5518
## Summary **Related to: ****https://gitlab.rtems.org/rtems/programs/gsoc/-/issues/8** This is groundwork for the GSoC issue linked above. The i386 BSP has all its APIC code mixed into `smp-imps.c` which is supposed to be just the MP table parser. Before we can do anything else from that issue, the APIC code currently needs to be decoupled of this driver, this is required to later on support APIC instead of PIC for non legacy systems. Key changes done: * Got rid of the dummy variable hack that was being used as the LAPIC base pointer and replaced it with a pointer that is NULL until the LAPIC is initialized. * Cleaned up how LAPIC registers are accessed to match how the x86_64 BSP already does it (array based) * Renamed the CPU/APIC mapping arrays to have consistent i386\_ prefixed names * Pulled the AP startup signaling out of boot_cpu() into its own functions so the APIC code and the MP table code are no longer mixed together * Removed unwanted externs and other clean ups -- View it on GitLab: https://gitlab.rtems.org/rtems/rtos/rtems/-/issues/5518 You're receiving this email because of your account on gitlab.rtems.org.
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