Mohamed Ayman commented on a discussion: https://gitlab.rtems.org/rtems/rtos/rtems/-/merge_requests/1203#note_149115 Hi, DR. @gedare :heart: First, thanks for the question. The current validation focusess on correctness of the timing calculations and register programming using unit tests with stubbed registers (covering standard mode, fast mode,, boundary cases, and overflow scenarios). **I agree that this does not fully guarantee correct behavior on real hardware.** I have **requested access to an STM32F4 board**, and once it is available I plan to validate this change on hardware by: * Measuring SCL frequency to confirm about400 kHz operation * Verifying rise time against the fast-mode requirement * Tessting communication with a real I2C device would someone with an STM32F4 board be willing to pull this branch and verify the SCL line with a logic analyzer. or I’ll follow up with results once the board is available. -- View it on GitLab: https://gitlab.rtems.org/rtems/rtos/rtems/-/merge_requests/1203#note_149115 You're receiving this email because of your account on gitlab.rtems.org.
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