On Tue, 10 Oct 2023 18:40:30 GMT, R1chterScale <d...@openjdk.org> wrote:
>> The goal of this PR is to address the follow-up comments to the SIMD >> accelerated sort PR (#14227) which implemented AVX512 intrinsics for >> Arrays.sort() methods. >> The proposed changes are: >> >> 1) Restriction of the AVX512 sort acceleration to only Intel CPUs. A >> performance regression (due to micro-architectural differences) was reported >> for AMD Zen4 CPUs in the comments section of PR. >> 2) Addressing the build failure due to a bug in GCC 12 (which was fixed in >> version 12.3.1). The details of the bug are at: >> https://gcc.gnu.org/bugzilla/show_bug.cgi?id=105593 >> 3) Minor changes in Javadoc strings > > Forgive me, I might be missing something very obvious, but is there any > particular reason to entirely disable the SIMD accelerated sort on Zen 4 > rather than having an alternate code path for Zen 4 where it has the > `compressstoreu` instructions split up into separate `compress` and `storeu` > instructions so that Zen 4 platforms can still benefit from a decent degree > of performance uplift from AVX512 acceleration of sort? @R1chterScale or someone can suggest patch for Zen 4 and test it so we can include it into these changes? Otherwise we will file separate followup RFE as Sandhya suggested? And yes, I need to run testing before approval but after we decide what to do with Zen 4 in these changes. ------------- PR Comment: https://git.openjdk.org/jdk/pull/16124#issuecomment-1758306441
