I haven't had any trouble compiling with the latest fft optimizations, but i think i know what your problem is. I just pushed something that should fix it. Can you pull from bwrc and try compiling again?
On 11/29/2010 09:11 PM, Mark Wagner wrote: > Hi Billy, > > I tried to compile a design with your modified fft_wideband_real and > received the following error during system generation (see below). Have > you been able to get a design to compile? Do you recognize the problem? > > Thanks, > Mark > > HDL simulation model compilation failed. > WARNING:Simulator:1010 - One or more environment variables have been > detected which affect the operation of the C compiler. These are > typically not set in standard installations and are not tested by > Xilinx, however they may be appropriate for your system, so the flow > will attempt to continue. If errors occur, try running fuse with the > "-mt off -v 1" switches to see more information from the C compiler. > The following environment variables have been detected: > Error occurred during "Simulation Initialization". > Reported by: > 'gbtspec_mode01/fft_wideband_real/fft_biplex_real_4x0/biplex_core/fft_stage_1/butterfly_direct/cadd/DSP48E' > > > On Tue, Nov 23, 2010 at 7:49 PM, William Mallard <w...@llard.net> > wrote: >> When dsp48_adders is enabled, butterfly_direct now uses caddsub >> blocks for complex addition, halving the number of dsp48s used. >> >> To implement this, the block's init script needed to be almost >> completely rewritten to redraw the block. It also necessitated >> the string of recent changes to all fft-related masks, as well >> as the creation of the parameterized caddsub_dsp48e block. >> >> All existing fft unit tests pass. >> >> Billy
