Hi John, The BEE2 user clock input circuit is actually LVPECL, which is probably why you've been encountering problems driving it using CMOS levels from the IBOB. Matt Dexter from UCB Radio Astronomy Lab has also designed a board to properly make the interface. It's been used pretty reliably on the ATA driving a rack of BEE2s from IBOBs.
Thanks, Henry
Also, we found that the clock signal we derive from the IBOB SMA connector is not quite up to the level needed to drive the BEE2 clock. A simple level shifter fixed the problem and made it rock-solid. A memo's in the works with pictures and drawings. John
