Hi, Louis, I'm not very familiar with the fft_biplex_2x block. One other thing to keep in mind is that the FFT blocks all use a "biplex" FFT block underneath. The biplex FFT block processes two complex streams simultaneously, which allows for 100% utilization of the underlying multipliers. I don't know off hand why the fft_wideband_real block would complain about the parameters you gave it. Maybe I am mistaken about "Number of Simultaneous Inputs" being log2 of the demux factor?
Dave On Nov 3, 2013, at 11:36 AM, Louis Dartez wrote: > Hello David, > > Thank you for this clarification on the “Bach-and-Rock” algorithm. The > deeper I delved into the FFT block the more confused I was getting because it > was difficult where the samples ended. This ri-to-c trick makes a lot more > sense to me now. Originally, I was planning to use the wideband_real fft > block with 2^1 simultaneous inputs. The entire reason I began looking into > the fft_biplex_2x block at all was because when I set N=1 for two > simultaneous inputs per stream I get the following error the moment I hit > “apply”: > > <Screen Shot 2013-11-03 at 11.35.26 AM.png> > > This means that N is restricted to N=>2. Is there a way around this or is the > biplex_2x what I want? > > L > On Nov 3, 2013, at 11:25 AM, David MacMahon <dav...@astro.berkeley.edu> wrote: > >> Hi, Louis, >> >> The plethora of FFT choices can be overwhelming. It would be nice if there >> were a "CASPER FFT Selection Guide" or flow-chart that would make things >> clearer, but I am not aware of any. I think if you want to use an ADC whose >> sample rate is greater than the FPGA fabric rate, then you will need to use >> the "fft_wideband_real". The "wideband" part of the name is intended to >> imply that is has a "demux" factor. For example, if your ADC samples at 500 >> Msps and presents two samples per 250 MHz FPGA clock cycle, the "demux >> factor" is 2. The dialog for the fft_wideband_real block has a field >> labeled "Number of simultaneous inputs (2^N)" into which you would place the >> log2 of the demux factor. In the example above, you would enter 1 in that >> field (demux factor 2 == 2^1). >> >> Another thing to be aware of is that most high level FFT blocks deal with >> real inputs since they are most often getting real samples from an ADC. The >> fundamental FFT implementation is complex-in/complex-out, so the trivial >> implementation would be to add a constant 0 imaginary component to the real >> ADC sample to make it complex. Though trivial, it is also very wasteful. >> The CASPER real-input FFTs do a "trick" where they combine two real streams >> into one complex stream by assigning one real input to the real component >> and the other real input to the imaginary component. The independent FFTs >> of the independent inputs can be recovered from the FFT of the complex >> signal by adding or subtracting opposite signed bins of the complex FFT. >> For real signals A and B, it works out to something like this: >> >> Z = A + Bi >> FFT_A(w) = FFT_Z(w) + FFT_Z(-w) >> FFT_B(w) = FFT_Z(w) - FFT_Z(-w) >> >> This is sometimes called "Bach-and-Rock" because one could put Bach music on >> one channel and Rock music on the other channel and they would remain >> independent. >> >> Real FFT blocks only output half the spectrum (the other half is redundant >> as it is just the conjugate of the first), so they usually have half as many >> outputs as inputs. Because of this, each output will either multiplex the >> spectra of two inputs or have half the demux factor of the input(s), >> depending on which real FFT block you're using. >> >> Hope this helps, >> Dave >> >> On Nov 3, 2013, at 10:37 AM, Louis Dartez wrote: >> >>> Hello Glenn, >>> >>> Thanks for this; I think I’m getting closer to understanding. I’m >>> shooting for an FFT implementation that gives me 2^11 FFT bins/channels for >>> each polarization (FFT size = 2^12). >>> >>> I’ve written my replies below: >>> >>> On Nov 3, 2013, at 4:48 AM, G Jones <glenn.calt...@gmail.com> wrote: >>>> Hi Louis, >>>> Replying to the list for the benefit of others. >>>> >>>> You have the right idea. The biplex real 2x block uses the basic biplex >>>> core to process two real signal streams or polzns simultaneously with two >>>> samples per stream per clock. In theory the top two inputs are for one >>>> stream and the result comes out the top output. >>>> >>>> >>> Something that’s confused me is that there is no way to explicitly tell the >>> fft_biplex_2x block how many individual “streams/polarizations” I want to >>> process like there is in the fft_wideband_real block. >>> <fft_wideband_pars.png> >>> <fft_2x_pars.png> >>>> Two important notes: >>>> For a long time, there was an error in this block, which may likely still >>>> be there where the inputs are mislabeled and a bit scrambled. This may >>>> have been fixed, but to be sure, look under the block. The two samples >>>> from a stream should be joined in an ri_to_c block. The error was that the >>>> streams were crossed so that one sample from each stream was incorrectly >>>> combined in the ri_to_c block. I am using this broken version just by >>>> ignoring the port labels and connecting the streams based on what the >>>> ri_to_c blocks are connected to. Hope that makes sense. >>>> >>>> >>> Yes, I think I get this; it may have since been fixed. I’ve attached an >>> image of the internals of the FFT block along with a possible >>> implementation scheme below: >>> <fft_biplex_2x_attempt.png> >>> <fft_2x_under_mask.png> >>> It would seem from the block internals that the samples that belong to the >>> two individual polarizations are (pol0_in, pol1_in) and (pol2_in,pol3_in), >>> respectively. Should I ignore the output port names (pol02_out and >>> pol13_out) and assume that the first (pol02_out) one is fft_0 (serving bin >>> 0, then bin 1, then bin 2…up to bin 2047) and the second fft_1? >>> >>>> Secondly, I've gotten confused by the number of stages/ length of fft >>>> setting for this block a few times. The length is the number of stages and >>>> the number of output frequency channels, but the length of the fft (needed >>>> by the pfb_fir block, for example) is twice this (the number of real >>>> samples in each fft). >>>> >>>> >>> >>> In the parameters for this block (image attached below) I set the size of >>> the FFT to be 2^12 (4096) because I want 2^11 (2048) actual FFT bins across >>> the spectrum. In the version that I have there is no input for telling the >>> FFT block how many stages there should be (opening it up I saw 12 >>> individual “fft_stage” blocks). >>> <fft_2x_pars.png> >>> From the CASPER wiki: >>> <Screen Shot 2013-11-03 at 10.26.55 AM.png> >>> >>> >>> My design will sport two dual input ADCs that output 2 real samples per SMA >>> input each FPGA clock; this a total of 8 real sampled values each clock / 4 >>> polarizations. In your opinion would it be better to simply change the >>> Number of simultaneous inputs parameter to 4*2 (instead of 4*1) to >>> accommodate for the extra two polarizations or should I just use another >>> block entirely? >>> <fft_biplex_2x_8inputs.png> >>> >>> Thanks for all the help! >>> Louis >>>> Hope this clarifies things, >>>> Glenn >>>> >>>> On Nov 2, 2013 11:49 PM, "Louis Dartez" <louisdar...@gmail.com> wrote: >>>> Hello Glenn, >>>> >>>> Thanks for the quick reply! I’m a bit confused as how this block works. >>>> I’m not quite sure what to make of the following statement from the casper >>>> wiki: Real inputs 0 and 2 share one output port (with the data for 0 >>>> coming first, then the data for 2), likewise for inputs 1 and 3, and so on. >>>> >>>> Which inputs/outputs correspond to which “stream” or “polarization”? Is >>>> the implementation in my attached image close? >>>> >>>> Thanks, >>>> L >>>> On Nov 2, 2013, at 8:06 PM, G Jones <glenn.calt...@gmail.com> wrote: >>>> >>>>> The biplex_real_2x is what you want, and it will do two 'polarizations' >>>>> at a time. >>>>> >>>>> On Nov 2, 2013 10:56 PM, "Louis Dartez" <louisdar...@gmail.com> wrote: >>>>> Hello Mark, Glenn, et al., >>>>> >>>>> >>>>> Does anyone know of any CASPER FFT block that will take as inputs two >>>>> real sampled values (per ADC input) and output a single complex-valued >>>>> frequency bin per FPGA clock? The three FFT blocks that I’ve found on the >>>>> CASPER block documentation and the latest mlib library (wideband real, >>>>> biplex real 4x, and the biplex real 2x) all accept real sampled values >>>>> but require a minimum of 4 simultaneous values per FPGA clock per ADC >>>>> input. I could really use an FFT block (and a corresponding polyphase FIR >>>>> block) that will accept only two real sampled values for each of a total >>>>> of four ADC inputs and spit out a single complex FFT bin (per stream) per >>>>> FPGA clock. >>>>> >>>>> Can someone point me in the right direction here? >>>>> >>>>> Thanks! >>>>> >>>>> L >>>>> >>>>> >>>>> >>>>>> Louis P. Dartez >>>>>> Graduate Student >>>>>> Center for Advanced Radio Astronomy >>>>>> University of Texas @ Brownsville >>>>> >>>> <fft_biplex_2x_attempt.png> >>>>> Louis P. Dartez >>>>> Graduate Student >>>>> Center for Advanced Radio Astronomy >>>>> University of Texas @ Brownsville >>>> >>> >>>> Louis P. Dartez >>>> Graduate Student >>>> Center for Advanced Radio Astronomy >>>> University of Texas @ Brownsville >>> >> > >> Louis P. Dartez >> Graduate Student >> Center for Advanced Radio Astronomy >> University of Texas @ Brownsville >
