Hey CASPER folks, I made a python module for controlling the onboard frequency synth on SNAP boards. The module defines a class that inherits from the corr.katcp_wrapper.FpgaClient class. I need to create some documentation for it, but here's a code snippet of how one would program the synth to output a 200 MHz clock signal from a 10 MHz reference frequency.
from SNAPsynth import LMX2581 synth = LMX2581(<IP of SNAP board>) synth.progdev(<the FPGA bof file>) synth.from_gen_synth(synth_mhz=200, ref_signal=10) The module can be found here: https://github.com/domagalski/snap-synth One thing to note is that while the clock from the synth should go directly to the FPGA, it doesn't seem to. I'm not sure if it's an issue with my configuration (don't think so) or possibly a bug in the JASPER toolflow. Either way, I've worked around it by redirecting the debugging SMA cable for the synth to the clock input on SNAP. -- Rachel Simone Domagalski
