Hi All,

Has anyone on the CASPER list investigated using the Xilinx transceivers as 
1-bit ADCs?

Transceiver receivers can be kept coherent to a reference clock by configuring 
the receiver clock-and-data-recovery unit not to recover the clock from the 
incoming data stream.

There are some people in the GPS section here at JPL that are interested in 
using the transceivers for 1-bit sampling of GPS signals. They were interested 
if there was any published literature on this. I have a vague recollection of a 
CASPER-related grad student investigating this ... but do not recall his name 
... making it a little hard to use Google as a backup for my memory.

Thanks!

Regards,
Dave Hawkins.



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