Hi Nivek,
Open the project in Vivado, then on the left under Implementation, click “Open 
Implemented Design”. Above the image of the device utilization, click the 
“Project Summary” tab. Scroll down to see the box that says Utilization, and 
then click “Table”.

I hope this helps! I can send more detail or screenshots if that would help.

Cheers,
Kathryn
________________________________
From: Nivek Ghazi <nivekghaz...@gmail.com>
Sent: Friday, June 21, 2019 4:29 AM
To: casper@lists.berkeley.edu
Subject: [casper] FPGA resource usage

Hey guys,

I have a quick question, how do you check amount of resources (bram, dsp 
slices, etc) your design is using? I'm using Vivado 2016.4 and the design is 
for a SNAP board.

cheers,
Nivek

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