Hi Adam,

 Infos, 0 Warnings, 0 Critical Warnings and 0 Errors encountered.
write_cfgmem completed successfully
INFO: [Common 17-206] Exiting Vivado at Wed Feb  3 13:27:22 2021...
Created 
/home/kjwiik/mlib_devel/jasper_library/test_models/test_snap_adc/outputs/test_snap_adc_2021-02-03_1321.bof
Created 
/home/kjwiik/mlib_devel/jasper_library/test_models/test_snap_adc/outputs/test_snap_adc_2021-02-03_1321.fpg
(casper-venv) kjwiik@casper:~/test$

Jippii!!

I cannot say how happy and grateful I am, many thanks to all and especially 
Adam for his patient and friendly advice

Huhhuh, that was a tough one.

The next step as our target is RFSoC/ZCU111: I noticed that there is a simple 
test for ZCU111, I'll try that and report. I'll also try to look how to use the 
yellow blocks from https://github.com/liuweiseu/ZCU111

Does anyone have something to test the ADC's, tutorials maybe? Perhaps some 
tutorials could be ported to ZCU111?

My guess is that if you compile the slx files I suggested in the previous 
thread or the above then It will work. In other words, I believe your toolflow 
should be fully functioning now. Time for a beer maybe? ;)

Indeed. When this pandemic is over, I hope to meet you and buy you one :-D!

Cheers!

Kaj

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