Dear Eoin, It has been a while since I played with the cordic algorithm. I used this for Radar signal processing in the day. The Xilinx should work, but if not try opencores.org and look for arithmetic operations. Refer to https://opencores.org/projects/cf_cordic. I can't remember the exact Cordic algorithm I used back then, but it was from Opencores and it did work well on the Altera FPGAs.
Just remember that you will need to properly pipeline the CORDIC function i.e. it will take longer than 1 clock cycle for the data to be valid. I think I had 4 or 5 cycle pipeline delay. I hope this helps! Kind regards, Adam On Mon, Dec 13, 2021 at 2:55 PM baldwin <bald...@cp.dias.ie> wrote: > Hi Guys, > > Quick question; I'm just wondering what is the best way to calculate > arctan on the FPGA? I am currently using the Xilinx CORDIC block to take > I and Q and use them to calculate phase, but have found this to give > unreliable data. While it sometimes gives out the correct phase value, > it often just gives completely nonsensical results. Just wondering if > anybody else has ever had similar issues. > > All the best, > > Eoin. > > -- > You received this message because you are subscribed to the Google Groups " > casper@lists.berkeley.edu" group. > To unsubscribe from this group and stop receiving emails from it, send an > email to casper+unsubscr...@lists.berkeley.edu. > To view this discussion on the web visit > https://groups.google.com/a/lists.berkeley.edu/d/msgid/casper/6a1e1ff7f781ec963db9c826b973adec%40cp.dias.ie > . > -- You received this message because you are subscribed to the Google Groups "casper@lists.berkeley.edu" group. To unsubscribe from this group and stop receiving emails from it, send an email to casper+unsubscr...@lists.berkeley.edu. To view this discussion on the web visit https://groups.google.com/a/lists.berkeley.edu/d/msgid/casper/CADTJ%3DnGkhwS19ciLM6Lv8WdqWLnDKk%2B3JTyV6b%2BwqAP5z-XZwg%40mail.gmail.com.
