Hi Wei,

The issue might be that the PDI you are attempting to use with `fpga_manager`  
is considered a “base” PDI that is part of the BOOT PDI image loaded by the PLM 
during boot. Since this PDI contains the PLM/PPU information these cores cannot 
be reconfigured at run time (as indicated by the PLM Error Status message).

A “full” PDI in Versal is considered to be the entire PL region except the 
configuration that is relevant to the “base" PDI. This most likely means that 
when not using a DFX flow some “manual” assmebly/generation/compiling of 
PDI/DTBO files needs to be done to produce files in the correct format expected 
by `fpga_manager` for a full PL reconfiguration. In some ways this may be 
similar to what was done when supporting UltraScale+ in Jasper by assembling 
fragments and then piecing it all together before applying the overlays.

This is very interesting work, good luck with it! Let us know what you learn.

Best,
Mitch


On Jan 2, 2024, at 11:31 AM, 'Wei Liu' via casper@lists.berkeley.edu 
<casper@lists.berkeley.edu> wrote:

Hi All,

Happy new year!

I'm working on the 400G Ethernet test on 
vpk180<https://www.xilinx.com/products/boards-and-kits/vpk180.html> board, 
which is based on the AMD Versal SoC chip.
To do the test remotely (and also to port the casper toolflow on this board 
later), I created a Ubuntu image for this board.
The OS boots up on this board successfully, but I can't configure the full PL 
through Linux by following the instructions 
here<https://xilinx-wiki.atlassian.net/wiki/spaces/A/pages/1188397412/Solution+Versal+PL+Programming>.

If I create a DFX vivado project, I can configure the PL through Linux with a 
partial pdi file;
If I try to configure the PL with a full pdi generated from Vivado, the error 
message I got is:
<image.png>
It looks like the full pdi file generated by Vivado can't be used in PL 
reconfiguration through Linux directly.

Does anyone know how to generate a full pdi for PL only , which can be used for 
PL configuration through Linux?

Thanks!
Best,
Wei



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