On 6/21/2016 9:47 AM, dwight wrote:
One has to realize that all complex chips are done in Verilog or
VHDL. Many old designs in processors can be re-implemented from
timing and bus diagrams.
Where do you get this info? Most of the little stuff I have seen
it is still graphic layout and Intel (or IBM ...) is not going to
tell you their design style.
This is no longer possible with todays processors like Intel or AMD
processors. The complexity of possible sequential events are more
than is practical to try to analyze from the pins.
One can implement an instruction set but you'll never get close to
the bus activity of current processors.
Who knows what secrets the cache holds?
I would say that the most important part of either language is the
ability to describe the time of simultaneous events. This is unlike
most programs written in C or such. Of course, one can write a
simulation language in C.
And a useless feature in my view. Real hardware has real delays
and simulation is prone errors translating to the real hardware.
Ben.
Dwight
PS: With the speed of modern transistors routing capacitance
and large die size; I think Vacuum tube/Drum memory might be better
model for modern computing.
