> On Feb 4, 2019, at 5:47 PM, Ethan Dicks <ethan.di...@gmail.com> wrote: > > On Mon, Feb 4, 2019 at 3:15 PM Paul Koning via cctalk > <cctalk@classiccmp.org> wrote: >>> On Feb 4, 2019, at 3:43 PM, Noel Chiappa via cctalk <cctalk@classiccmp.org> >>> wrote: >> That translates into "the problem depends on the physical address of the >> code being executed". >> >> The obvious answer is bad memory. > > At the board level, yes. Deeper, it could be bad memory bits or bad > memory decode. > > A simple ones-and-zeros test can identify bad DRAMs. It's not as > likely to find bad decoding, which could result in the same chips > tested more than once and other chips not tested at all. I've found > both problems in real MS11-L boards I have for my stack of 11/04 and > 11/34s I'm testing. > > ISTR in the DEC world, they were good about that. I have multiple > papertapes for the PDP-8, that I think were literally called "ones and > zeros" and "memory address" tests. I would think XXDP has something > similar in terms of progressive tests that expect the previous stage > passed. Yes, one of the standard early PDP-11 memory tests is the "no duplicate address test". paul
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- RE: PDP-11/45 RSTS/E boot problem Wayne S via cctalk
- RE: PDP-11/45 RSTS/E boot problem Noel Chiappa via cctalk
- Re: PDP-11/45 RSTS/E boot problem Paul Koning via cctalk
- Re: PDP-11/45 RSTS/E boot problem Ethan Dicks via cctalk
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- Re: PDP-11/45 RSTS/E boot proble... Fritz Mueller via cctalk
- RE: PDP-11/45 RSTS/E boot problem Wayne S via cctalk
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