Tony Duell wrote: > My first thought, and it's probably wrong, is that these instrucitons > (which differ by one bit, so might be > setting/reseting something) are NOPs to the CPU, but are interpretted > by the memory mapping hardware in those > 9825s that have more than 64K or RAM and ROM total.
This seems likely. According to your schematics, gate U47 detects the pattern 0701xx. This signal feeds into the U43c flipflop, which appears to latch the state of the low 4 bits of the MAD bus into register U42, which sets the state of the /ForceRAM (bit 3), /ForceROM (bit 2), /DiagRd (bit 1) and ALLROM (bit 0) signals. Thus, these two instructions appear to toggle the state of the /ForceROM signal. If I’ve wrapped my brain around the details it appears that 070113 deasserts the /ForceROM signal, and 070117 asserts it?
