Do we really need -O3 in this test? On Mon, Nov 17, 2014 at 8:34 AM, Chad Rosier <mcros...@codeaurora.org> wrote:
> Author: mcrosier > Date: Mon Nov 17 10:34:47 2014 > New Revision: 222144 > > URL: http://llvm.org/viewvc/llvm-project?rev=222144&view=rev > Log: > [Reassociate] Update test cases due to r222142. > > Modified: > cfe/trunk/test/CodeGen/aarch64-neon-intrinsics.c > cfe/trunk/test/CodeGen/bmi-builtins.c > cfe/trunk/test/CodeGen/builtins-arm-exclusive.c > > Modified: cfe/trunk/test/CodeGen/aarch64-neon-intrinsics.c > URL: > http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/aarch64-neon-intrinsics.c?rev=222144&r1=222143&r2=222144&view=diff > > ============================================================================== > --- cfe/trunk/test/CodeGen/aarch64-neon-intrinsics.c (original) > +++ cfe/trunk/test/CodeGen/aarch64-neon-intrinsics.c Mon Nov 17 10:34:47 > 2014 > @@ -8172,13 +8172,13 @@ int64_t test_vcltzd_s64(int64_t a) { > > int64_t test_vtstd_s64(int64_t a, int64_t b) { > // CHECK-LABEL: test_vtstd_s64 > -// CHECK: {{cmtst d[0-9]+, d[0-9]+, d[0-9]+|tst x1, x0}} > +// CHECK: {{cmtst d[0-9]+, d[0-9]+, d[0-9]+|tst x0, x1}} > return (int64_t)vtstd_s64(a, b); > } > > uint64_t test_vtstd_u64(uint64_t a, uint64_t b) { > // CHECK-LABEL: test_vtstd_u64 > -// CHECK: {{cmtst d[0-9]+, d[0-9]+, d[0-9]+|tst x1, x0}} > +// CHECK: {{cmtst d[0-9]+, d[0-9]+, d[0-9]+|tst x0, x1}} > return (uint64_t)vtstd_u64(a, b); > } > > > Modified: cfe/trunk/test/CodeGen/bmi-builtins.c > URL: > http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/bmi-builtins.c?rev=222144&r1=222143&r2=222144&view=diff > > ============================================================================== > --- cfe/trunk/test/CodeGen/bmi-builtins.c (original) > +++ cfe/trunk/test/CodeGen/bmi-builtins.c Mon Nov 17 10:34:47 2014 > @@ -20,7 +20,7 @@ unsigned short test__tzcnt_u16(unsigned > > unsigned int test__andn_u32(unsigned int __X, unsigned int __Y) { > // CHECK: [[DEST:%.*]] = xor i32 %{{.*}}, -1 > - // CHECK-NEXT: %{{.*}} = and i32 %{{.*}}, [[DEST]] > + // CHECK-NEXT: %{{.*}} = and i32 [[DEST]], %{{.*}} > return __andn_u32(__X, __Y); > } > > @@ -54,7 +54,7 @@ unsigned int test__tzcnt_u32(unsigned in > > unsigned long long test__andn_u64(unsigned long __X, unsigned long __Y) { > // CHECK: [[DEST:%.*]] = xor i64 %{{.*}}, -1 > - // CHECK-NEXT: %{{.*}} = and i64 %{{.*}}, [[DEST]] > + // CHECK-NEXT: %{{.*}} = and i64 [[DEST]], %{{.*}} > return __andn_u64(__X, __Y); > } > > @@ -95,7 +95,7 @@ unsigned short test_tzcnt_u16(unsigned s > > unsigned int test_andn_u32(unsigned int __X, unsigned int __Y) { > // CHECK: [[DEST:%.*]] = xor i32 %{{.*}}, -1 > - // CHECK-NEXT: %{{.*}} = and i32 %{{.*}}, [[DEST]] > + // CHECK-NEXT: %{{.*}} = and i32 [[DEST]], %{{.*}} > return _andn_u32(__X, __Y); > } > > @@ -130,7 +130,7 @@ unsigned int test_tzcnt_u32(unsigned int > > unsigned long long test_andn_u64(unsigned long __X, unsigned long __Y) { > // CHECK: [[DEST:%.*]] = xor i64 %{{.*}}, -1 > - // CHECK-NEXT: %{{.*}} = and i64 %{{.*}}, [[DEST]] > + // CHECK-NEXT: %{{.*}} = and i64 [[DEST]], %{{.*}} > return _andn_u64(__X, __Y); > } > > > Modified: cfe/trunk/test/CodeGen/builtins-arm-exclusive.c > URL: > http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/builtins-arm-exclusive.c?rev=222144&r1=222143&r2=222144&view=diff > > ============================================================================== > --- cfe/trunk/test/CodeGen/builtins-arm-exclusive.c (original) > +++ cfe/trunk/test/CodeGen/builtins-arm-exclusive.c Mon Nov 17 10:34:47 > 2014 > @@ -94,7 +94,7 @@ int test_ldrex(char *addr, long long *ad > // CHECK: [[RESHI64:%.*]] = zext i32 [[RESHI]] to i64 > // CHECK: [[RESLO64:%.*]] = zext i32 [[RESLO]] to i64 > // CHECK: [[RESHIHI:%.*]] = shl nuw i64 [[RESHI64]], 32 > -// CHECK: [[INTRES:%.*]] = or i64 [[RESHIHI]], [[RESLO64]] > +// CHECK: [[INTRES:%.*]] = or i64 [[RESLO64]], [[RESHIHI]] > // CHECK: bitcast i64 [[INTRES]] to double > > // CHECK-ARM64: [[INTRES:%.*]] = tail call i64 > @llvm.aarch64.ldxr.p0i64(i64* [[ADDR64]]) > @@ -178,7 +178,7 @@ int test_ldaex(char *addr, long long *ad > // CHECK: [[RESHI64:%.*]] = zext i32 [[RESHI]] to i64 > // CHECK: [[RESLO64:%.*]] = zext i32 [[RESLO]] to i64 > // CHECK: [[RESHIHI:%.*]] = shl nuw i64 [[RESHI64]], 32 > -// CHECK: [[INTRES:%.*]] = or i64 [[RESHIHI]], [[RESLO64]] > +// CHECK: [[INTRES:%.*]] = or i64 [[RESLO64]], [[RESHIHI]] > // CHECK: bitcast i64 [[INTRES]] to double > > // CHECK-ARM64: [[INTRES:%.*]] = tail call i64 > @llvm.aarch64.ldaxr.p0i64(i64* [[ADDR64]]) > @@ -323,7 +323,7 @@ __int128 test_ldrex_128(__int128 *addr) > // CHECK-ARM64: [[RESHI64:%.*]] = zext i64 [[RESHI]] to i128 > // CHECK-ARM64: [[RESLO64:%.*]] = zext i64 [[RESLO]] to i128 > // CHECK-ARM64: [[RESHIHI:%.*]] = shl nuw i128 [[RESHI64]], 64 > -// CHECK-ARM64: [[INTRES:%.*]] = or i128 [[RESHIHI]], [[RESLO64]] > +// CHECK-ARM64: [[INTRES:%.*]] = or i128 [[RESLO64]], [[RESHIHI]] > // CHECK-ARM64: ret i128 [[INTRES]] > } > > @@ -349,7 +349,7 @@ __int128 test_ldaex_128(__int128 *addr) > // CHECK-ARM64: [[RESHI64:%.*]] = zext i64 [[RESHI]] to i128 > // CHECK-ARM64: [[RESLO64:%.*]] = zext i64 [[RESLO]] to i128 > // CHECK-ARM64: [[RESHIHI:%.*]] = shl nuw i128 [[RESHI64]], 64 > -// CHECK-ARM64: [[INTRES:%.*]] = or i128 [[RESHIHI]], [[RESLO64]] > +// CHECK-ARM64: [[INTRES:%.*]] = or i128 [[RESLO64]], [[RESHIHI]] > // CHECK-ARM64: ret i128 [[INTRES]] > } > > > > _______________________________________________ > cfe-commits mailing list > cfe-commits@cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/cfe-commits >
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