[PATCH] [mips] Add support for 'ZC' inline assembly memory constraint.

[Daniel Sanders]

Hi atanasyan,

Also add tests for 'R' and 'm'.

http://reviews.llvm.org/D8449

Files:
  lib/Basic/Targets.cpp
  test/CodeGen/mips-inline-asm.c

Index: lib/Basic/Targets.cpp
===================================================================
--- lib/Basic/Targets.cpp
+++ lib/Basic/Targets.cpp
@@ -5927,7 +5927,28 @@
     case 'R': // An address that can be used in a non-macro load or store
       Info.setAllowsMemory();
       return true;
+    case 'Z':
+      if (Name[1] == 'C') { // An address usable by ll, and sc.
+        Info.setAllowsMemory();
+        Name++; // Skip over 'Z'.
+        return true;
+      }
+      break;
+    }
+  }
+
+  std::string convertConstraint(const char *&Constraint) const override {
+    std::string R;
+    switch (*Constraint) {
+    case 'Z': // Two-character constraint; add "^" hint for later parsing.
+      if (Constraint[1] == 'C') {
+        R = std::string("^") + std::string(Constraint, 2);
+        Constraint++;
+        return R;
+      }
+      break;
     }
+    return TargetInfo::convertConstraint(Constraint);
   }
 
   const char *getClobbers() const override {
Index: test/CodeGen/mips-inline-asm.c
===================================================================
--- /dev/null
+++ test/CodeGen/mips-inline-asm.c
@@ -0,0 +1,19 @@
+// REQUIRES: mips-registered-target
+// RUN: %clang_cc1 -triple mips-linux-gnu -emit-llvm -o - %s | FileCheck %s
+
+int data;
+
+void m () {
+  asm("lw $1, %0" :: "m"(data));
+  // CHECK: call void asm sideeffect "lw $$1, $0", "*m,~{$1}"(i32* @data)
+}
+
+void ZC () {
+  asm("ll $1, %0" :: "ZC"(data));
+  // CHECK: call void asm sideeffect "ll $$1, $0", "*^ZC,~{$1}"(i32* @data)
+}
+
+void R () {
+  asm("lw $1, %0" :: "R"(data));
+  // CHECK: call void asm sideeffect "lw $$1, $0", "*R,~{$1}"(i32* @data)
+}

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Index: lib/Basic/Targets.cpp
===================================================================
--- lib/Basic/Targets.cpp
+++ lib/Basic/Targets.cpp
@@ -5927,7 +5927,28 @@
     case 'R': // An address that can be used in a non-macro load or store
       Info.setAllowsMemory();
       return true;
+    case 'Z':
+      if (Name[1] == 'C') { // An address usable by ll, and sc.
+        Info.setAllowsMemory();
+        Name++; // Skip over 'Z'.
+        return true;
+      }
+      break;
+    }
+  }
+
+  std::string convertConstraint(const char *&Constraint) const override {
+    std::string R;
+    switch (*Constraint) {
+    case 'Z': // Two-character constraint; add "^" hint for later parsing.
+      if (Constraint[1] == 'C') {
+        R = std::string("^") + std::string(Constraint, 2);
+        Constraint++;
+        return R;
+      }
+      break;
     }
+    return TargetInfo::convertConstraint(Constraint);
   }
 
   const char *getClobbers() const override {
Index: test/CodeGen/mips-inline-asm.c
===================================================================
--- /dev/null
+++ test/CodeGen/mips-inline-asm.c
@@ -0,0 +1,19 @@
+// REQUIRES: mips-registered-target
+// RUN: %clang_cc1 -triple mips-linux-gnu -emit-llvm -o - %s | FileCheck %s
+
+int data;
+
+void m () {
+  asm("lw $1, %0" :: "m"(data));
+  // CHECK: call void asm sideeffect "lw $$1, $0", "*m,~{$1}"(i32* @data)
+}
+
+void ZC () {
+  asm("ll $1, %0" :: "ZC"(data));
+  // CHECK: call void asm sideeffect "ll $$1, $0", "*^ZC,~{$1}"(i32* @data)
+}
+
+void R () {
+  asm("lw $1, %0" :: "R"(data));
+  // CHECK: call void asm sideeffect "lw $$1, $0", "*R,~{$1}"(i32* @data)
+}

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