Author: ed
Date: Fri May 31 14:18:14 2013
New Revision: 183029

URL: http://llvm.org/viewvc/llvm-project?rev=183029&view=rev
Log:
Slightly extend matching for atomic loads.

Also add the "=" to the matched pattern, to see whether we actually save
the loaded value.

Modified:
    cfe/trunk/test/CodeGen/atomics-inlining.c

Modified: cfe/trunk/test/CodeGen/atomics-inlining.c
URL: 
http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/atomics-inlining.c?rev=183029&r1=183028&r2=183029&view=diff
==============================================================================
--- cfe/trunk/test/CodeGen/atomics-inlining.c (original)
+++ cfe/trunk/test/CodeGen/atomics-inlining.c Fri May 31 14:18:14 2013
@@ -24,26 +24,26 @@ void test1(void) {
   (void)__atomic_load(&ll1, &ll2, memory_order_seq_cst);
 
 // PPC32: define void @test1
-// PPC32: load atomic i8* @c1 seq_cst
-// PPC32: load atomic i16* @s1 seq_cst
-// PPC32: load atomic i32* @i1 seq_cst
+// PPC32: = load atomic i8* @c1 seq_cst
+// PPC32: = load atomic i16* @s1 seq_cst
+// PPC32: = load atomic i32* @i1 seq_cst
 // PPC32: call void @__atomic_load(i32 8, i8* bitcast (i64* @ll1 to i8*)
 
 // PPC64: define void @test1
-// PPC64: load atomic i8* @c1 seq_cst
-// PPC64: load atomic i16* @s1 seq_cst
-// PPC64: load atomic i32* @i1 seq_cst
-// PPC64: load atomic i64* @ll1 seq_cst
+// PPC64: = load atomic i8* @c1 seq_cst
+// PPC64: = load atomic i16* @s1 seq_cst
+// PPC64: = load atomic i32* @i1 seq_cst
+// PPC64: = load atomic i64* @ll1 seq_cst
 
 // MIPS32: define void @test1
-// MIPS32: load atomic i8* @c1 seq_cst
-// MIPS32: load atomic i16* @s1 seq_cst
-// MIPS32: load atomic i32* @i1 seq_cst
+// MIPS32: = load atomic i8* @c1 seq_cst
+// MIPS32: = load atomic i16* @s1 seq_cst
+// MIPS32: = load atomic i32* @i1 seq_cst
 // MIPS32: call void @__atomic_load(i32 8, i8* bitcast (i64* @ll1 to i8*)
 
 // MIPS64: define void @test1
-// MIPS64: load atomic i8* @c1 seq_cst
-// MIPS64: load atomic i16* @s1 seq_cst
-// MIPS64: load atomic i32* @i1 seq_cst
-// MIPS64: load atomic i64* @ll1 seq_cst
+// MIPS64: = load atomic i8* @c1 seq_cst
+// MIPS64: = load atomic i16* @s1 seq_cst
+// MIPS64: = load atomic i32* @i1 seq_cst
+// MIPS64: = load atomic i64* @ll1 seq_cst
 }


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