Jason wrote:
Greetings,

This is a quick and simple question. Can someone confirm my suspicion that GRE is process switched on a 2651XM?

on 12.4 and later code (can't remember exactly where we did it) the SYN is CEF switched and the rest of the flow. RST/FIN's are process switched to tear down the translation.

Then if you have any ALG processing for embedded payload it's all process switched.

Plug for NAT:

ASR1k does it all in hardware. ;)


  Also, if there's a document
somewhere outlining what is process switched on which router/switch that would be really handy to have.

Doesn't exist. Too many variables.




Thanks,
Jason
_______________________________________________
cisco-nsp mailing list  [email protected]
https://puck.nether.net/mailman/listinfo/cisco-nsp
archive at http://puck.nether.net/pipermail/cisco-nsp/
_______________________________________________
cisco-nsp mailing list  [email protected]
https://puck.nether.net/mailman/listinfo/cisco-nsp
archive at http://puck.nether.net/pipermail/cisco-nsp/

Reply via email to