> What issues are you having on the 04 and 08s? Nothing that cannot be avoided (mostly, that is) by planning explicitly the placement of ports in lacp/pagp groups vs. subint-fannout/access ports vs. inter-chassis links, so as to avoid the port asic<-->fabric channel "some ports are almost line rate, some less" and the ever-popular "this port of the lag takes this path, the other one, not!" These complexities also show up in lsp load balancing behavior, and get more interesting when you ask "what is the bandwidth of this port, really?" questions with respects to TE functions.
Searching the c-nsp archives will reveal many and varied issues, none entirely untenable, but all generally extra work and trouble for someone along the support chain. Having 'future revisions' of the 6704/8/etc cards not require that engineers be concerned and expertly familiar with the arrangement of ports -> port asic -> fabric channel/dfc would be high on my cisco hardware wishlist. -Tk _______________________________________________ cisco-nsp mailing list cisco-nsp@puck.nether.net https://puck.nether.net/mailman/listinfo/cisco-nsp archive at http://puck.nether.net/pipermail/cisco-nsp/
