After further thought and having been a little short, I thought I'd add
something to my previous offering.  I specifically remember two very
odd questions on the CCIE written (roughly) about this subject, no
kiddin'.....

Throughput=Switching Time+(Packet SizexTime per Byte) Look at this
formula a little more closely. It says, for one thing, that the time
normally
needed to switch a packet is a constant, made up of factors like
interrupt
frequency, header processing, routing table lookup time needed, and so
on.
Also, the throughput formula claims that there is a component to
throughput
that is proportional to packet size and that represents the time needed
to
copy a packet before translating it.

Using this formula can be of some help in comparing routers whose
vendors
use differing yardsticks in measuring their products' performance.
Another way
of making sense of such comparisons is to obtain throughput statistics
for different-
size packets, perhaps of a minimum, middle, and maximum size. Or you
could
look for two different statistics--switching speed given in packets per
second
and throughput represented as bytes per second.

r/
rainman

"Howard C. Berkowitz" wrote:

> >Hello to All,
> >
> >What command can I use on a Cisco router to display
> >the Mhz power of the router?
> >
> >
> >Thanks
> >
> >Omer
>
> What problem are you trying to solve?
>
> Even small routers have some distributed intelligence -- the physical
> and data link handling are not in the main processor.  As you move up
> in routing power, more and more ASICs and processors are involved in
> handling an individual packet.  Performance can vary significanty
> with the particular path a packet takes through the router.
>
> So the MHz of one processor doesn't necessarily determine router
> performance.  Indeed, I'm not even sure if MHz is a meaningful
> measurement for some of the ASICs.  Perhaps a more hardware-literate
> person can comment there--they presumably are clocked.
>
> Another area, more to the point in very high speed routers, is that
> the chips are evolving to having multiple data streams and possibly
> multiple instruction streams.

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