Rusty, Not sure about it. Why don't you try to load the image again from a TFTP and see if you getting this error again.
Thanks Ganesh -----Original Message----- From: [EMAIL PROTECTED] [mailto:[EMAIL PROTECTED] On Behalf Of Wilmes, Rusty Sent: Wednesday, July 23, 2003 12:36 PM To: [EMAIL PROTECTED] Subject: ios upgrade... [7:72779] Hi, I tried upgrading IOS on a 3620 via the console (about 1.75 hours!) Now there's some ugliness in the boot. I verified the flash and it seems ok. Boot and sho ver follows. Just seeing if anyone had any input... Thanks Rusty System Bootstrap, Version 11.1(7)AX [kuong (7)AX], EARLY DEPLOYMENT RELEASE SOFT WARE (fc2) Copyright (c) 1994-1996 by cisco Systems, Inc. C3600 processor with 65536 Kbytes of main memory Main memory is configured to 32 bit mode with parity disabled program load complete, entry point: 0x80008000, size: 0x843438 Self decompressing the image : #####.....######[OK] %ERR-1-GT64010: Fatal error, PCI Master abort cause=0x0300E483, mask=0x0CD01F00, real_cause=0x00000400 bus_err_high=0x00000000, bus_err_low=0x31000000, addr_decode_err=0x1FE0000E Restricted Rights Legend Use, duplication, or disclosure by the Government is subject to restrictions as set forth in subparagraph (c) of the Commercial Computer Software - Restricted Rights clause at FAR sec. 52.227-19 and subparagraph (c) (1) (ii) of the Rights in Technical Data and Computer Software clause at DFARS sec. 252.227-7013. cisco Systems, Inc. 170 West Tasman Drive San Jose, California 95134-1706 Cisco Internetwork Operating System Software IOS (tm) 3600 Software (C3620-IS-M), Version 12.1(20), RELEASE SOFTWARE (fc2) Copyright (c) 1986-2003 by cisco Systems, Inc. Compiled Thu 29-May-03 17:29 by kellythw Image text-base: 0x60008940, data-base: 0x60EB4000 cisco 3620 (R4700) processor (revision 0x81) with 61440K/4096K bytes of memory. Processor board ID 06072235 R4700 CPU at 80Mhz, Implementation 33, Rev 1.0 Bridging software. X.25 software, Version 3.0.0. SuperLAT software (copyright 1990 by Meridian Technology Corp). DRAM configuration is 32 bits wide with parity disabled. 29K bytes of non-volatile configuration memory. 16384K bytes of processor board System flash (Read/Write) Press RETURN to get started! 00:00:06: %LINK-4-NOMAC: A random default MAC address of 0000.0c86.2235 has been chosen. Ensure that this address is unique, or specify MAC addresses for commands (such as 'novell routing') that allow the use of this address as a default. 00:00:07: %SYS-5-CONFIG_I: Configured from memory by console 00:00:10: %SYS-5-RESTART: System restarted -- Cisco Internetwork Operating System Software IOS (tm) 3600 Software (C3620-IS-M), Version 12.1(20), RELEASE SOFTWARE (fc2) Copyright (c) 1986-2003 by cisco Systems, Inc. Compiled Thu 29-May-03 17:29 by kellythw Router> Router> Router>sho ver Cisco Internetwork Operating System Software IOS (tm) 3600 Software (C3620-IS-M), Version 12.1(20), RELEASE SOFTWARE (fc2) Copyright (c) 1986-2003 by cisco Systems, Inc. Compiled Thu 29-May-03 17:29 by kellythw Image text-base: 0x60008940, data-base: 0x60EB4000 ROM: System Bootstrap, Version 11.1(7)AX [kuong (7)AX], EARLY DEPLOYMENT RELEASE SOFTWARE (fc2) Router uptime is 0 minutes System returned to ROM by power-on System image file is "flash:c3620-is-mz.121-20.bin" cisco 3620 (R4700) processor (revision 0x81) with 61440K/4096K bytes of memory. Processor board ID 06072235 R4700 CPU at 80Mhz, Implementation 33, Rev 1.0 Bridging software. X.25 software, Version 3.0.0. SuperLAT software (copyright 1990 by Meridian Technology Corp). DRAM configuration is 32 bits wide with parity disabled. 29K bytes of non-volatile configuration memory. 16384K bytes of processor board System flash (Read/Write) Configuration register is 0x2102 Router> Message Posted at: http://www.groupstudy.com/form/read.php?f=7&i=72873&t=72779 -------------------------------------------------- FAQ, list archives, and subscription info: http://www.groupstudy.com/list/cisco.html Report misconduct and Nondisclosure violations to [EMAIL PROTECTED]