Understand about the chip vendors. It is the case, though, that system vendors often have NDA's with the chip vendors ... and they are the immediate customer of the chip vendors, so have some leverage to get their help resolving the issues. I think the first step is doing the right measurements, to show that the chip is a bottleneck (as you are doing with Lantiq). -----Original Message----- From: "Jim Gettys" <[email protected]> Sent: Friday, December 21, 2012 1:45pm To: "David P Reed" <[email protected]> Cc: "Dave Taht" <[email protected]>, "bloat-devel" <[email protected]>, "[email protected]" <[email protected]>, "[email protected]" <[email protected]>, [email protected] Subject: Re: [Cerowrt-devel] hardware hacking on fq_codel in FPGA form at 10GigE
On Fri, Dec 21, 2012 at 1:25 PM, <[mailto:[email protected]] [email protected]> wrote: I'm sure the HSPA+ modem is a binary blob. For regulatory reasons, if nothing else... When I said open, I did not mean the ultimate ideal. Hardware devices with firmware are often sold as black boxes. Fixing the bloat in HSPA+ and LTE systems will require organizations like Ericsson, ALU and Cisco and Huawei to get their acts together and fix their own bugs. Actually, this needs probably/certainly needs help from the chip vendors as well as the system vendors. The system vendors (such as ALU) often get their chips and drivers from those chip vendors. I haven't looked into the HSPA+ or LTE systems; I am looking into DSL. In the DSL concrete example, Broadcom controls the bulk of the DSL chip market, and (at least on the client home router end) provides a binary blob Linux driver based on an antique Linux release (2.6.26, IIRC). The hardware itself did not look like it had bad buffering, but the drivers.... I've been working with blogic (John Crispin) on debloating the Lantiq driver, which we are trying to test; since it is entirely open source. In the Lantiq DSL driver case, the hardware sprouted exactly the same sort of transmit/receive rings found in ethernet drivers, with the corresponding bufferbloat due to device drivers being totally stupid. Unfortunately, BQL is ethernet only, and right now doesn't work properly at low bandwidths. When John cut the transmit ring down to 2 packets, the latency dropped (at the bandwidth he was testing at, .5Mbps) to around 60ms running fq_codel, about what you would expect given the remaining buffers; we have to automate the control of the transmit ring properly (since we probably do need some help when running VDSL at 100Mbps). I suspect/expect we'll find similar "features" when we dig into LTE and HSPA+, though that is not certain. Now, back to my saga of my recalcitrant water well, after which I can go back to testing DSL the next trip to New Jersey (and flush the toilets and have heat; I have geothermal heat...). Sigh, - Jim -----Original Message----- From: "Jim Gettys" <[mailto:[email protected]] [email protected]> Sent: Friday, December 21, 2012 1:14pm To: "David P Reed" <[mailto:[email protected]] [email protected]> Cc: "Dave Taht" <[mailto:[email protected]] [email protected]>, "bloat-devel" <[mailto:[email protected]] [email protected]>, "[mailto:[email protected]] [email protected]" <[mailto:[email protected]] [email protected]>, "[mailto:[email protected]] [email protected]" <[mailto:[email protected]] [email protected]> Subject: Re: [Cerowrt-devel] hardware hacking on fq_codel in FPGA form at 10GigE On Fri, Dec 21, 2012 at 12:48 PM, <[mailto:[email protected]] [email protected]> wrote: And if you want an open tablet the ODROID U2 there is pretty nice for <$900 all in, including an HSPA+ modem w/GPS. I can only imagine what one can do with this.... Often the modem bits are binary blobs. Any information on this front? - Jim -----Original Message----- From: "Dave Taht" <[mailto:[email protected]] [email protected]> Sent: Friday, December 21, 2012 7:34am To: [mailto:[email protected]] [email protected] Cc: "Hal Murray" <[mailto:[email protected]] [email protected]>, "bloat-devel" <[mailto:[email protected]] [email protected]>, [mailto:[email protected]] [email protected], [mailto:[email protected]] [email protected] Subject: Re: [Cerowrt-devel] hardware hacking on fq_codel in FPGA form at 10GigE It really is astounding what is going on in the arm world: [http://www.hardkernel.com/renewal_2011/products/prdt_info.php?g_code=G135341370451] http://www.hardkernel.com/renewal_2011/products/prdt_info.php?g_code=G135341370451 > The wndr3700v4 is out, and appears to be a good hardware upgrade from > the 3800 series, but it's not supported by openwrt yet. > > I took a look at their GPL source distribution. And yea! it's openwrt. > And boo! it's ancient openwrt, for example dnsmasq is 2.39 (current is > 2.64), and their kernel is 2.6.31. > > I think the cpu and ethernet chips tho look a lot better: Atheros > AR9344+ AR9580(5GHz)+AR9344(2.4GHz). It's my hope these do ipv6 > better. > > I have looked at similar products from buffalo and others, would like > external antennas and a good switch this time around. Thoughts? > > -- > Dave Täht > > Fixing bufferbloat with cerowrt: > [http://www.teklibre.com/cerowrt/subscribe.html] > http://www.teklibre.com/cerowrt/subscribe.html -- Dave Täht Fixing bufferbloat with cerowrt: [http://www.teklibre.com/cerowrt/subscribe.html] http://www.teklibre.com/cerowrt/subscribe.html _______________________________________________ Bloat-devel mailing list [mailto:[email protected]] [email protected] [https://lists.bufferbloat.net/listinfo/bloat-devel] https://lists.bufferbloat.net/listinfo/bloat-devel
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