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here is the log from the commit of package intel-ipsec-mb for openSUSE:Factory 
checked in at 2025-01-16 20:23:55
++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
Comparing /work/SRC/openSUSE:Factory/intel-ipsec-mb (Old)
 and      /work/SRC/openSUSE:Factory/.intel-ipsec-mb.new.1881 (New)
++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++

Package is "intel-ipsec-mb"

Thu Jan 16 20:23:55 2025 rev:5 rq:1238292 version:2.0.0

Changes:
--------
--- /work/SRC/openSUSE:Factory/intel-ipsec-mb/intel-ipsec-mb.changes    
2023-11-17 20:51:54.218336444 +0100
+++ /work/SRC/openSUSE:Factory/.intel-ipsec-mb.new.1881/intel-ipsec-mb.changes  
2025-01-16 20:23:56.609879726 +0100
@@ -1,0 +2,35 @@
+Thu Jan 16 15:35:49 UTC 2025 - Tomasz Kantecki <tomasz.kante...@intel.com>
+
+- Update to v2.0:
+  * YASM support removed.
+  * CMake: CET support added, man page installation fix, FreeBSD support added.
+  * Replaced Makefiles with CMake as default build system.
+  * Updated style check to clang-format version 18.
+  * AES-GCM: reduced binary size, small packet optimization, removed AVX512 
type 1, improved AVX2 type 1, new AVX2 type 2 added.
+  * DES, 3DES/TDES and DES-DOCSIS: binary size reduction, reduced stack frame 
size, re-used common transpose macros.
+  * Fixed LFSR update in single buffer ZUC API implementation.
+  * SM4: added SM4-CTR and SM4-GCM SSE code, added AVX2-SM4-NI code for 
SM4-GCM, SM4-CTR, SM4-CBC and SM4-ECB.
+  * SHA2-512/384 & and HMAC-SHA2-512/384: added AVX2-SHA512-NI single-buffer 
and x2 multi-buffer code.
+  * SM3 and SM3-HMAC: added SM3-NI implementations.
+  * Added AES-CFB SSE type 1 and AVX512 type 2 implementations.
+  * Removed AESNI emulation support.
+  * Removed AVX Type 2 implementation.
+  * Removed AES-CMAC, AES-CCM, AES-CBC and AES-ECB x4 and by4 implementations 
from SSE type 1.
+  * Removed AVX type 1 implementations: SHA/MD5, CHACHA20-POLY1305, SNOW3G and 
KASUMI.
+  * Removed AVX architecture type.
+  * Changed SHA1 on AVX2 type 4 architecture to use multi-buffer 
implementation.
+  * Added check for XSAVE and OSXSAVE CPUID features for any AVX architecture 
type.
+  * Extended cipher burst API support with: AES-ECB, AES-CFB.
+  * Extended hash burst API support with: SHA1, SHA2-384/512, AES-CMAC.
+  * Added AEAD burst API with AES-CCM support.
+  * Added new API to retrieve optimal minimum burst size for hash, cipher and 
AEAD API's.
+- Fixed issues:
+  * Version 1.5 fails to build on FreeBSD 13.2 (amd64) using CMake (issue #136)
+  * Make CMake builds behave more "normal" (issue #141)
+  * printf in lib code prevents using ipsec-mb in SGX environment (issue #142)
+  * EEA3(ZUC) 1 Buffer implementation LFSR update can result in invalid LFSR 
state, causing incorrect keystream generation (issue #144)
+  * Possible regression: init_mb_mgr_avx() corrupts state on Windows (issue 
#147)
+  * Crash seen on VMware with dpdk crypto using ipsec-mb library (issue #153)
+- More details at https://github.com/intel/intel-ipsec-mb/releases/tag/v2.0
+
+-------------------------------------------------------------------

Old:
----
  intel-ipsec-mb-1.5.tar.gz

New:
----
  intel-ipsec-mb-2.0.tar.gz

++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++

Other differences:
------------------
++++++ intel-ipsec-mb.spec ++++++
--- /var/tmp/diff_new_pack.C0EO0w/_old  2025-01-16 20:23:58.345951619 +0100
+++ /var/tmp/diff_new_pack.C0EO0w/_new  2025-01-16 20:23:58.361952281 +0100
@@ -1,7 +1,7 @@
 #
 # spec file for package intel-ipsec-mb
 #
-# Copyright (c) 2023 SUSE LLC
+# Copyright (c) 2025 SUSE LLC
 # Copyright (c) 2022, Intel Corporation
 #
 # All modifications and additions to the file contributed by third parties
@@ -17,8 +17,8 @@
 #
 
 
-%global major        1
-%global minor        5
+%global major        2
+%global minor        0
 %global patch        0
 
 # GitHub properties

++++++ intel-ipsec-mb-1.5.tar.gz -> intel-ipsec-mb-2.0.tar.gz ++++++
++++ 154113 lines of diff (skipped)

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