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Hello community,

here is the log from the commit of package dav1d for openSUSE:Factory checked 
in at 2026-01-02 14:27:13
++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
Comparing /work/SRC/openSUSE:Factory/dav1d (Old)
 and      /work/SRC/openSUSE:Factory/.dav1d.new.1928 (New)
++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++

Package is "dav1d"

Fri Jan  2 14:27:13 2026 rev:42 rq:1324933 version:1.5.3

Changes:
--------
--- /work/SRC/openSUSE:Factory/dav1d/dav1d.changes      2025-11-04 
18:40:56.301843639 +0100
+++ /work/SRC/openSUSE:Factory/.dav1d.new.1928/dav1d.changes    2026-01-02 
14:27:19.565488684 +0100
@@ -1,0 +2,9 @@
+Wed Dec 31 19:42:15 UTC 2025 - Luigi Baldoni <[email protected]>
+
+- Update to version 1.5.3
+  * Misc small optimizations
+  * RISC-V assembly optimizations for ipred, emu_edge and w_mask,
+    and VLEN 512 for blend functions
+  * Fix issue with ivf files with 0 frames in tools
+
+-------------------------------------------------------------------

Old:
----
  dav1d-1.5.2.tar.gz

New:
----
  dav1d-1.5.3.tar.gz

++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++

Other differences:
------------------
++++++ dav1d.spec ++++++
--- /var/tmp/diff_new_pack.vG9gMN/_old  2026-01-02 14:27:20.389522781 +0100
+++ /var/tmp/diff_new_pack.vG9gMN/_new  2026-01-02 14:27:20.393522947 +0100
@@ -19,7 +19,7 @@
 %define sover   7
 
 Name:           dav1d
-Version:        1.5.2
+Version:        1.5.3
 Release:        0
 Summary:        An AV1 decoder
 License:        BSD-2-Clause

++++++ dav1d-1.5.2.tar.gz -> dav1d-1.5.3.tar.gz ++++++
diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn' 
'--exclude=.svnignore' old/dav1d-1.5.2/NEWS new/dav1d-1.5.3/NEWS
--- old/dav1d-1.5.2/NEWS        2025-10-27 20:44:47.000000000 +0100
+++ new/dav1d-1.5.3/NEWS        2025-12-31 15:50:45.000000000 +0100
@@ -1,3 +1,13 @@
+Changes for 1.5.3 'Sonic':
+--------------------------
+
+1.5.3 is a minor release of dav1d, focused on RISC-V and maintenance:
+ - Misc small optimizations
+ - RISC-V assembly optimizations for ipred, emu_edge and w_mask,
+   and VLEN 512 for blend functions
+ - Fix issue with ivf files with 0 frames in tools
+
+
 Changes for 1.5.2 'Sonic':
 --------------------------
 
@@ -41,7 +51,7 @@
  - picture: copy HDR10+ and T35 metadata only to visible frames
  - SSSE3 new optimizations for 6-tap (8bit and hbd)
  - AArch64/SVE: Add HBD subpel filters using 128-bit SVE2
- - AArch64: Add USMMLA implempentation for 6-tap H/HV
+ - AArch64: Add USMMLA Implementation for 6-tap H/HV
  - AArch64: Optimize Armv8.0 NEON for HBD horizontal filters and 6-tap filters
  - Power9: Optimized ITX till 16x4.
  - Loongarch: numerous optimizations
diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn' 
'--exclude=.svnignore' old/dav1d-1.5.2/README.md new/dav1d-1.5.3/README.md
--- old/dav1d-1.5.2/README.md   2025-10-27 20:44:47.000000000 +0100
+++ new/dav1d-1.5.3/README.md   2025-12-31 15:50:45.000000000 +0100
@@ -124,6 +124,13 @@
 2. During meson configuration, specify `-Dtestdata_tests=true`
 3. Run `meson test -v` after compiling
 
+## Decoder conformance tests (optional but encouraged)
+
+1. Download the argon conformance bitstreams from 
https://streams.videolan.org/argon/
+2. Extract into dav1d directory by running `tar -xvf argon.tar.zst`
+3. Execute tests with `tests/dav1d_argon.bash -d build/tools/dav1d -a argon`
+4. Expected outcome is `2763 files successfully verified in XXmYYs (dav1d 
1.x.y-zz-gHHHHHHH filmgrain=1 cpumask=-1)`
+
 # Support
 
 This project is partially funded by the *Alliance for Open Media*/**AOM** and 
is supported by TwoOrioles and VideoLabs.
diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn' 
'--exclude=.svnignore' old/dav1d-1.5.2/examples/dp_renderer.h 
new/dav1d-1.5.3/examples/dp_renderer.h
--- old/dav1d-1.5.2/examples/dp_renderer.h      2025-10-27 20:44:47.000000000 
+0100
+++ new/dav1d-1.5.3/examples/dp_renderer.h      2025-12-31 15:50:45.000000000 
+0100
@@ -140,6 +140,9 @@
 
     win = SDL_CreateWindow("Dav1dPlay", SDL_WINDOWPOS_CENTERED, 
SDL_WINDOWPOS_CENTERED,
         WINDOW_WIDTH, WINDOW_HEIGHT, window_flags);
+    if (!win)
+        return NULL;
+
     SDL_SetWindowResizable(win, SDL_TRUE);
 
     return win;
diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn' 
'--exclude=.svnignore' old/dav1d-1.5.2/examples/dp_renderer_placebo.c 
new/dav1d-1.5.3/examples/dp_renderer_placebo.c
--- old/dav1d-1.5.2/examples/dp_renderer_placebo.c      2025-10-27 
20:44:47.000000000 +0100
+++ new/dav1d-1.5.3/examples/dp_renderer_placebo.c      2025-12-31 
15:50:45.000000000 +0100
@@ -86,17 +86,20 @@
 
     // Create Window
     SDL_Window *sdlwin = dp_create_sdl_window(window_flags | 
SDL_WINDOW_RESIZABLE);
-    if (sdlwin == NULL)
+    if (sdlwin == NULL) {
+        fprintf(stderr, "Creating SDL window failed: %s\n", SDL_GetError());
         return NULL;
+    }
 
     SDL_ShowCursor(0);
 
     // Alloc
     Dav1dPlayRendererPrivateContext *const rd_priv_ctx =
         calloc(1, sizeof(Dav1dPlayRendererPrivateContext));
-    if (rd_priv_ctx == NULL)
+    if (rd_priv_ctx == NULL) {
+        fprintf(stderr, "Out of memory!\n");
         return NULL;
-
+    }
     rd_priv_ctx->win = sdlwin;
 
     // Init libplacebo
@@ -109,6 +112,7 @@
 #endif
     ));
     if (rd_priv_ctx->log == NULL) {
+        fprintf(stderr, "pl_log_create failed!\n");
         free(rd_priv_ctx);
         return NULL;
     }
@@ -130,6 +134,9 @@
 {
     SDL_Window *sdlwin = NULL;
     SDL_GL_SetAttribute(SDL_GL_CONTEXT_FLAGS, SDL_GL_CONTEXT_DEBUG_FLAG);
+    SDL_GL_SetAttribute(SDL_GL_CONTEXT_MAJOR_VERSION, 3);
+    SDL_GL_SetAttribute(SDL_GL_CONTEXT_MINOR_VERSION, 0);
+    SDL_GL_SetAttribute(SDL_GL_CONTEXT_PROFILE_MASK, 
SDL_GL_CONTEXT_PROFILE_CORE);
 
     // Common init
     Dav1dPlayRendererPrivateContext *rd_priv_ctx =
@@ -140,6 +147,10 @@
     sdlwin = rd_priv_ctx->win;
 
     rd_priv_ctx->gl_context = SDL_GL_CreateContext(sdlwin);
+    if (!rd_priv_ctx->gl_context) {
+        fprintf(stderr, "Failed creating opengl context: %s\n", 
SDL_GetError());
+        exit(2);
+    }
     SDL_GL_MakeCurrent(sdlwin, rd_priv_ctx->gl_context);
 
     rd_priv_ctx->gl = pl_opengl_create(rd_priv_ctx->log, pl_opengl_params(
diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn' 
'--exclude=.svnignore' old/dav1d-1.5.2/examples/dp_renderer_sdl.c 
new/dav1d-1.5.3/examples/dp_renderer_sdl.c
--- old/dav1d-1.5.2/examples/dp_renderer_sdl.c  2025-10-27 20:44:47.000000000 
+0100
+++ new/dav1d-1.5.3/examples/dp_renderer_sdl.c  2025-12-31 15:50:45.000000000 
+0100
@@ -50,14 +50,16 @@
         window_flags |= SDL_WINDOW_FULLSCREEN_DESKTOP;
 
     SDL_Window *win = dp_create_sdl_window(window_flags);
-    if (win == NULL)
+    if (win == NULL) {
+        fprintf(stderr, "Creating SDL window failed: %s\n", SDL_GetError());
         return NULL;
-
+    }
     SDL_ShowCursor(0);
 
     // Alloc
     Dav1dPlayRendererPrivateContext *rd_priv_ctx = 
malloc(sizeof(Dav1dPlayRendererPrivateContext));
     if (rd_priv_ctx == NULL) {
+        fprintf(stderr, "Out of memory!\n");
         return NULL;
     }
     rd_priv_ctx->win = win;
diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn' 
'--exclude=.svnignore' old/dav1d-1.5.2/meson.build new/dav1d-1.5.3/meson.build
--- old/dav1d-1.5.2/meson.build 2025-10-27 20:44:47.000000000 +0100
+++ new/dav1d-1.5.3/meson.build 2025-12-31 15:50:45.000000000 +0100
@@ -23,7 +23,7 @@
 # SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 
 project('dav1d', ['c'],
-    version: '1.5.2',
+    version: '1.5.3',
     default_options: ['c_std=c99',
                       'warning_level=2',
                       'buildtype=release',
diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn' 
'--exclude=.svnignore' old/dav1d-1.5.2/src/cdef_apply_tmpl.c 
new/dav1d-1.5.3/src/cdef_apply_tmpl.c
--- old/dav1d-1.5.2/src/cdef_apply_tmpl.c       2025-10-27 20:44:47.000000000 
+0100
+++ new/dav1d-1.5.3/src/cdef_apply_tmpl.c       2025-12-31 15:50:45.000000000 
+0100
@@ -143,7 +143,7 @@
         edges &= ~CDEF_HAVE_LEFT;
         edges |= CDEF_HAVE_RIGHT;
         enum Backup2x8Flags prev_flag = 0;
-        for (int sbx = 0, last_skip = 1; sbx < sb64w; sbx++, edges |= 
CDEF_HAVE_LEFT) {
+        for (int sbx = 0; sbx < sb64w; sbx++, edges |= CDEF_HAVE_LEFT) {
             const int sb128x = sbx >> 1;
             const int sb64_idx = ((by & sbsz) >> 3) + (sbx & 1);
             const int cdef_idx = lflvl[sb128x].cdef_idx[sb64_idx];
@@ -151,7 +151,7 @@
                 (!f->frame_hdr->cdef.y_strength[cdef_idx] &&
                  !f->frame_hdr->cdef.uv_strength[cdef_idx]))
             {
-                last_skip = 1;
+                prev_flag = 0;
                 goto next_sb;
             }
 
@@ -184,10 +184,10 @@
                 // go to the next block
                 const uint32_t bx_mask = 3U << (bx & 30);
                 if (!(noskip_mask & bx_mask)) {
-                    last_skip = 1;
+                    prev_flag = 0;
                     goto next_b;
                 }
-                const int do_left = last_skip ? flag : (prev_flag ^ flag) & 
flag;
+                const enum Backup2x8Flags do_left = (prev_flag ^ flag) & flag;
                 prev_flag = flag;
                 if (do_left && edges & CDEF_HAVE_LEFT) {
                     // we didn't backup the prefilter data because it wasn't
@@ -287,7 +287,6 @@
 
             skip_uv:
                 bit ^= 1;
-                last_skip = 0;
 
             next_b:
                 bptrs[0] += 8;
diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn' 
'--exclude=.svnignore' old/dav1d-1.5.2/src/ext/x86/x86inc.asm 
new/dav1d-1.5.3/src/ext/x86/x86inc.asm
--- old/dav1d-1.5.2/src/ext/x86/x86inc.asm      2025-10-27 20:44:47.000000000 
+0100
+++ new/dav1d-1.5.3/src/ext/x86/x86inc.asm      2025-12-31 15:50:45.000000000 
+0100
@@ -43,18 +43,26 @@
     %endif
 %endif
 
+%define WIN32  0
 %define WIN64  0
 %define UNIX64 0
 %if ARCH_X86_64
     %ifidn __OUTPUT_FORMAT__,win32
+        %define WIN32  1
         %define WIN64  1
     %elifidn __OUTPUT_FORMAT__,win64
+        %define WIN32  1
         %define WIN64  1
     %elifidn __OUTPUT_FORMAT__,x64
+        %define WIN32  1
         %define WIN64  1
     %else
         %define UNIX64 1
     %endif
+%else
+    %ifidn __OUTPUT_FORMAT__,win32
+        %define WIN32  1
+    %endif
 %endif
 
 %define FORMAT_ELF 0
@@ -837,6 +845,11 @@
     %else
         global %2
     %endif
+    %if WIN32 && !%1
+        %ifdef BUILDING_DLL
+            export %2
+        %endif
+    %endif
     align function_align
     %2:
     RESET_MM_PERMUTATION        ; needed for x86-64, also makes disassembly 
somewhat nicer
diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn' 
'--exclude=.svnignore' old/dav1d-1.5.2/src/mc_tmpl.c 
new/dav1d-1.5.3/src/mc_tmpl.c
--- old/dav1d-1.5.2/src/mc_tmpl.c       2025-10-27 20:44:47.000000000 +0100
+++ new/dav1d-1.5.3/src/mc_tmpl.c       2025-12-31 15:50:45.000000000 +0100
@@ -736,16 +736,16 @@
     const int mask_rnd = 1 << (mask_sh - 5);
     do {
         for (int x = 0; x < w; x++) {
-            const int m = imin(38 + ((abs(tmp1[x] - tmp2[x]) + mask_rnd) >> 
mask_sh), 64);
-            dst[x] = iclip_pixel((tmp1[x] * m +
-                                  tmp2[x] * (64 - m) + rnd) >> sh);
+            const int tmpdiff = tmp1[x] - tmp2[x];
+            const int m = imin(38 + ((abs(tmpdiff) + mask_rnd) >> mask_sh), 
64);
+            dst[x] = iclip_pixel((tmpdiff * m + tmp2[x] * 64 + rnd) >> sh);
 
             if (ss_hor) {
                 x++;
 
-                const int n = imin(38 + ((abs(tmp1[x] - tmp2[x]) + mask_rnd) 
>> mask_sh), 64);
-                dst[x] = iclip_pixel((tmp1[x] * n +
-                                      tmp2[x] * (64 - n) + rnd) >> sh);
+                const int tmpdiff = tmp1[x] - tmp2[x];
+                const int n = imin(38 + ((abs(tmpdiff) + mask_rnd) >> 
mask_sh), 64);
+                dst[x] = iclip_pixel((tmpdiff * n + tmp2[x] * 64 + rnd) >> sh);
 
                 if (h & ss_ver) {
                     mask[x >> 1] = (m + n + mask[x >> 1] + 2 - sign) >> 2;
diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn' 
'--exclude=.svnignore' old/dav1d-1.5.2/src/mem.h new/dav1d-1.5.3/src/mem.h
--- old/dav1d-1.5.2/src/mem.h   2025-10-27 20:44:47.000000000 +0100
+++ new/dav1d-1.5.3/src/mem.h   2025-12-31 15:50:45.000000000 +0100
@@ -101,15 +101,22 @@
     // must be an integral multiple of alignment.
     return aligned_alloc(align, ROUND_UP(sz, align));
 #else
-#error No aligned allocation functions are available
+    void *const buf = malloc(sz + align + sizeof(void *));
+    if (!buf) return NULL;
+
+    void *const ptr = (void *)(((uintptr_t)buf + sizeof(void *) + align - 1) & 
~(align - 1));
+    ((void **)ptr)[-1] = buf;
+    return ptr;
 #endif
 }
 
 static inline void dav1d_free_aligned_internal(void *ptr) {
 #ifdef _WIN32
     _aligned_free(ptr);
-#else
+#elif HAVE_POSIX_MEMALIGN || HAVE_MEMALIGN || HAVE_ALIGNED_ALLOC
     free(ptr);
+#else
+    if (ptr) free(((void **)ptr)[-1]);
 #endif
 }
 
diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn' 
'--exclude=.svnignore' old/dav1d-1.5.2/src/riscv/64/ipred.S 
new/dav1d-1.5.3/src/riscv/64/ipred.S
--- old/dav1d-1.5.2/src/riscv/64/ipred.S        2025-10-27 20:44:47.000000000 
+0100
+++ new/dav1d-1.5.3/src/riscv/64/ipred.S        2025-12-31 15:50:45.000000000 
+0100
@@ -27,6 +27,53 @@
 
 #include "src/riscv/asm.S"
 
+// void ipred_v_8bpc_rvv(pixel *dst, const ptrdiff_t stride,
+//                       const pixel *const topleft,
+//                       const int width, const int height, const int a,
+//                       const int max_width, const int max_height)
+function ipred_v_8bpc_rvv, export=1, ext="v,zba"
+    csrw vxrm, zero
+    addi a2, a2, 1
+    vsetvli t0, a3, e8, m1, ta, ma
+    bne t0, a3, 3f  // Go to slow path - whole row doesn't fit in regsiter
+1:
+    // Fast path - row fits in register
+    add t1, a0, a1
+    vle8.v v4, (a2)
+2:
+    vse8.v v4, (a0)
+    sh1add a0, a1, a0
+    vse8.v v4, (t1)
+    sh1add t1, a1, t1
+    addi a4, a4, -2
+    bnez a4, 2b
+    ret
+
+    // Row doesn't fit in register.
+3:
+    vsetvli t0, a3, e8, m2, ta, ma  // Try using 2 registers at once (LMUL=2)
+    beq t0, a3, 1b  // Back to fast path - now it fits
+
+4:
+    // No need for more vsetli, since both width and VLEN are power of 2, so 
there is no tail.
+    vle8.v v4, (a2)
+    mv t2, a0
+    mv t1, a4
+5:
+    vse8.v v4, (t2)
+    add t2, t2, a1
+    addi t1, t1, -1
+    bnez t1, 5b  // Loop over rows.
+
+    sub a3, a3, t0
+    add a2, a2, t0
+    add a0, a0, t0
+    bnez a3, 4b  // Loop over columns
+
+    ret
+endfunc
+
+
 function dc_gen_8bpc_rvv, export=1, ext="v,zbb"
     .variant_cc dav1d_dc_gen_8bpc_rvv
     add t1, a1, a2
diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn' 
'--exclude=.svnignore' old/dav1d-1.5.2/src/riscv/64/mc.S 
new/dav1d-1.5.3/src/riscv/64/mc.S
--- old/dav1d-1.5.2/src/riscv/64/mc.S   2025-10-27 20:44:47.000000000 +0100
+++ new/dav1d-1.5.3/src/riscv/64/mc.S   2025-12-31 15:50:45.000000000 +0100
@@ -1,6 +1,7 @@
 /******************************************************************************
  * Copyright © 2018, VideoLAN and dav1d authors
  * Copyright © 2024, Nathan Egge, Niklas Haas, Bogdan Gligorijevic
+ * Copyright © 2025, Sungjoon Moon
  * All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without
@@ -27,6 +28,13 @@
 
 #include "src/riscv/asm.S"
 
+function blend_vl512_8bpc_rvv, export=1, ext=zbb
+  srai t0, a3, 3
+  ctz t0, t0
+  addi t0, t0, 0xc5
+  j L(blend_epilog)
+endfunc
+
 function blend_vl256_8bpc_rvv, export=1, ext=zbb
   ctz t0, a3
   addi t0, t0, 0xc3
@@ -69,6 +77,14 @@
   ret
 endfunc
 
+function blend_h_vl512_8bpc_rvv, export=1, ext=zbb
+  srai t0, a3, 3
+  li t2, 64
+  ctz t0, t0
+  addi t0, t0, 0xc5
+  j L(blend_h_epilog)
+endfunc
+
 function blend_h_vl256_8bpc_rvv, export=1, ext=zbb
   srai t0, a3, 2
   li t2, 64
@@ -137,6 +153,13 @@
   j 0b
 endfunc
 
+function blend_v_vl512_8bpc_rvv, export=1, ext=zbb
+  srai t0, a3, 3
+  ctz t0, t0
+  addi t0, t0, 0xc5
+  j L(blend_v_epilog)
+endfunc
+
 function blend_v_vl256_8bpc_rvv, export=1, ext=zbb
   srai t0, a3, 2
   ctz t0, t0
@@ -532,3 +555,421 @@
 
     ret
 endfunc
+
+function emu_edge_8bpc_rvv, export=1, ext="v,zbb"
+  ld t0, 0(sp)
+  ld t1, 8(sp)
+
+  // int cx = iclip((int) x, 0, (int) iw - 1);
+  max t2, a4, zero
+  addi t4, a2, -1
+  min t2, t2, t4
+
+  // int cy = iclip((int) y, 0, (int) ih - 1);
+  max t3, a5, zero
+  addi t5, a3, -1
+  min t3, t3, t5
+
+  // ref += cy*PXSTRIDE(ref_stride) + cx
+  mul t3, t3, t1
+  add t3, t3, t2
+
+  add t0, t0, t3
+
+  addi t4, a0, -1
+
+  neg t2, a4
+  add t3, a4, a0
+  sub t3, t3, a2
+
+  // int left_ext = iclip((int) -x, 0, (int) bw - 1);
+  max t2, t2, zero
+  min a2, t2, t4 # a2 = left_ext
+
+  // int right_ext = iclip((int) (x + bw - iw), 0, (int) bw - 1);
+  max t3, t3, zero
+  min a4, t3, t4 # a4 = right_ext
+
+  addi t6, a1, -1
+
+  neg t4, a5
+  add t5, a5, a1
+  sub t5, t5, a3
+
+  // int top_ext = iclip((int) -y, 0, (int) bh - 1);
+  max t4, t4, zero
+  min a3, t4, t6 # a3 = top_ext
+
+  // int bottom_ext = iclip((int) (x + bh - ih), 0, (int) bh - 1);
+  max t5, t5, zero
+  min a5, t5, t6 # a5 = bottom_ext
+
+  sub t4, a1, a3
+  sub t4, t4, a5 # t4 = center_h
+
+  mul t5, a3, a7
+  add a1, a6, t5 # blk = dst + top_ext * dst_stride
+
+  sub t3, a0, a2
+  sub t3, t3, a4 # t3 = center_w = bw - left_ext - right_ext
+
+.macro v_loop need_left, need_right
+9:
+  # pixel_copy()
+  add t5, a1, a2 # t5 = blk + left_ext
+  mv t2, t0 # ref
+0:
+  vsetvli t6, t3, e8, m1, ta, ma
+  vle8.v v8, (t2)
+  add t2, t2, t6
+
+  vse8.v v8, (t5)
+  sub t3, t3, t6
+  add t5, t5, t6
+  bnez t3, 0b
+
+  sub t3, a0, a2
+  sub t3, t3, a4 # t3 = center_w = bw - left_ext - right_ext
+
+.if \need_left
+  lb t2, (t0) # ref[0]
+  # pixel_set()
+  vsetvli t6, a2, e8, m1, ta, ma
+  vmv.v.x v8, t2
+  mv t2, a2 # left_ext
+  mv t5, a1 # blk
+0:
+  vse8.v v8, (t5)
+  sub t2, t2, t6 # left_ext -= t6
+  add t5, t5, t6 # blk += t6
+  vsetvli t6, t2, e8, m1, ta, ma
+  bnez t2, 0b
+.endif
+
+.if \need_right
+  add t5, a1, a2 # t5 = blk + left_ext
+  add t5, t5, t3 # t5 = blk + left_ext + center_w
+  lb t2, -1(t5) # blk[left_ext + center_w - 1]
+  # pixel_set()
+  vsetvli t6, a4, e8, m1, ta, ma
+  vmv.v.x v8, t2
+  mv t2, a4 # right_ext
+0:
+  vse8.v v8, (t5)
+  sub t2, t2, t6
+  add t5, t5, t6
+  vsetvli t6, t2, e8, m1, ta, ma
+  bnez t2, 0b
+.endif
+
+  add t0, t0, t1 # ref += ref_stride
+  add a1, a1, a7 # blk += dst_stride
+  addi t4, t4, -1 # center_h--
+  bnez t4, 9b
+.endm
+
+L(emu_edge_center):
+  blez t4, L(emu_edge_bottom)
+
+  beqz a2, 1f # if (left_ext)
+  beqz a4, 2f # if (right_ext)
+  v_loop 1, 1
+  j L(emu_edge_bottom)
+
+1:
+  beqz a4, 3f
+  v_loop 0, 1
+  j L(emu_edge_bottom)
+
+2:
+  v_loop 1, 0
+  j L(emu_edge_bottom)
+
+3:
+  v_loop 0, 0
+
+L(emu_edge_bottom): # copy bottom
+  blez a5, L(emu_edge_top)
+  mv t2, a0 # bw
+2:
+  mv t5, a5 # bottom_ext
+  mv t1, a1 # dst
+
+  vsetvli t6, t2, e8, m1, ta, ma
+  sub t0, t1, a7 # dst - dst_stride
+  vle8.v v8, (t0)
+0:
+  vse8.v v8, (t1)
+  add t1, t1, a7
+  addi t5, t5, -1
+  bnez t5, 0b
+
+  sub t2, t2, t6
+  add a1, a1, t6
+  bnez t2, 2b
+
+L(emu_edge_top): # copy top
+  blez a3, L(emu_edge_end)
+  mul t5, a3, a7
+  add t1, a6, t5 # blk = dst + top_ext * PXSTRIDE(dst_stride)
+  # a6 = dst
+1:
+  mv t0, a3 # top_ext
+  mv t4, a6 # dst
+
+  vsetvli t6, a0, e8, m1, ta, ma
+  vle8.v v8, (t1)
+0:
+  vse8.v v8, (t4)
+  add t4, t4, a7
+  vse8.v v8, (t4)
+  add t4, t4, a7
+  addi t0, t0, -2
+  bgtz t0, 0b
+
+  sub a0, a0, t6
+  add t1, t1, t6
+  add a6, a6, t6
+
+  bnez a0, 1b
+
+L(emu_edge_end):
+  ret
+endfunc
+
+.macro w_mask_fn type vlen
+function w_mask_\type\()_\vlen\()8bpc_rvv, export=1, ext="v,zba,zbb"
+  csrw vxrm, zero
+  li t1, 38*256+8
+.ifc \vlen, vl256_
+  addi t0, zero, 64
+  bgt a4, t0, 2f
+  li t2, 0xCAC9C8CFCE0000
+  li t3, 0xC1C0C7C6C50000
+.else
+  addi t0, zero, 32
+  bgt a4, t0, 2f
+  li t2, 0xCAC9C8CF0000
+  li t3, 0xC1C0C7C60000
+.endif
+  ctz t4, a4
+  slli t4, t4, 3
+  srl t2, t2, t4
+  andi t2, t2, 0xFF
+  srl t3, t3, t4
+  andi t3, t3, 0xFF
+
+1:
+.if \type == 444
+w_mask_body 444 narrow
+
+  sh1add a0, a1, a0 # dst += dst_stride
+  add a6, a6, a4 # mask += w
+.elseif \type == 422
+w_mask_body 422 narrow
+
+  sh1add a0, a1, a0 # dst += dst_stride
+  srli t4, a4, 1
+  add a6, a6, t4 # mask += w >> 1
+.elseif \type == 420
+w_mask_body 420 narrow
+
+  sh1add a0, a1, a0 # dst += dst_stride
+.endif
+
+  sh1add a2, a4, a2
+  sh1add a3, a4, a3
+
+  addi a5, a5, -2
+  bnez a5, 1b
+
+  ret
+
+2:
+  li t2, 0xca
+  li t3, 0xc1
+
+3:
+  mv t5, zero
+
+.if \type == 444
+w_mask_body 444 wide # VLEN>=256
+.elseif \type == 422
+w_mask_body 422 wide # VLEN>=256
+.elseif \type == 420
+w_mask_body 420 wide # VLEN>=256
+.endif
+
+  add t5, t5, t6
+  bne t5, a4, 4b
+
+  sh1add a0, a1, a0 # dst += dst_stride
+.if \type == 444
+  add a6, a6, a4 # mask += w
+.elseif \type == 422
+  srli t4, a4, 1
+  add a6, a6, t4 # mask += w >> 1
+.elseif \type == 420
+.endif
+
+  sh1add a2, a4, a2
+  sh1add a3, a4, a3
+
+  addi a5, a5, -2
+  bnez a5, 3b
+
+  ret
+
+endfunc
+.endm
+
+.macro w_mask_body type size
+  mv t0, a0 # dst
+
+4:
+  vsetvl t6, a4, t2
+
+  # load tmp1 and tmp2
+  vle16.v v0, (a2) # tmp1[x]
+
+  sh1add t4, a4, a2 # tmp1
+  vle16.v v16, (t4) # tmp1[x]
+  sh1add a2, t6, a2 # tmp1 += w / k
+
+  vle16.v v4, (a3) # tmp2[x]
+
+  sh1add t4, a4, a3 # tmp2
+  vle16.v v20, (t4) # tmp2[x]
+  sh1add a3, t6, a3 # tmp2 += w / k
+
+  # v12 = abs(tmp1[x] - tmp2[x])
+  vsub.vv v12, v0, v4 # tmp1[x] - tmp2[x]
+  vsub.vv v8, v4, v0 # tmp2[x] - tmp1[x]
+  vmax.vv v8, v12, v8
+
+  vsub.vv v28, v16, v20 # tmp1[x] - tmp2[x]
+  vsub.vv v24, v20, v16 # tmp2[x] - tmp1[x]
+  vmax.vv v24, v28, v24
+
+  li t4, 64
+
+  # min(38 + (v12 + 8) >> 8, 64) -> min((v12 + 38*256 + 8) >> 8, 64)
+  vadd.vx v8, v8, t1
+  vsra.vi v8, v8, 8
+  vmin.vx v8, v8, t4
+
+  vadd.vx v24, v24, t1
+  vsra.vi v24, v24, 8
+  vmin.vx v24, v24, t4
+
+  # dst[x] = (tmp1[x] - tmp2[x]) * m + 64 * tmp2[x];
+  # v12, v28 = tmp1[x] - tmp2[x]
+  # v8, v24 = {m,n}
+  vwmul.vx v0, v4, t4
+  vwmacc.vv v0, v8, v12
+  vnclipu.wi v0, v0, 10
+  vmax.vx v0, v0, zero
+
+  vwmul.vx v16, v20, t4
+  vwmacc.vv v16, v24, v28
+  vnclipu.wi v16, v16, 10
+  vmax.vx v16, v16, zero
+
+.if \type == 444
+  vsetvl zero, zero, t3
+
+  vnclipu.wi v0, v0, 0
+  vnclipu.wi v16, v16, 0
+
+  vse8.v v0, (t0) # dst[x] =
+  add t4, t0, a1
+  vse8.v v16, (t4) # dst[x] =
+  add t0, t0, t6
+
+  vnsrl.wi v8, v8, 0
+  vnsrl.wi v24, v24, 0
+
+  vse8.v v8, (a6) # mask[x] = m
+  add t4, a6, a4
+  vse8.v v24, (t4) # mask[x] = m
+  add a6, a6, t6
+
+.elseif \type == 422
+  # v4, v20 = m
+  # v12, v28 = n
+  vnsrl.wi v4, v8, 0
+  vnsrl.wi v8, v8, 16
+
+  vnsrl.wi v20, v24, 0
+  vnsrl.wi v24, v24, 16
+
+  # v8, v24 = m + n - sign
+  vadd.vv v8, v4, v8
+  vsub.vx v8, v8, a7
+
+  vadd.vv v24, v20, v24
+  vsub.vx v24, v24, a7
+
+  vsetvl zero, zero, t3
+
+  vnclipu.wi v0, v0, 0
+  vnclipu.wi v16, v16, 0
+
+  vse8.v v0, (t0) # dst[x] =
+  add t4, t0, a1
+  vse8.v v16, (t4) # dst[x] =
+  add t0, t0, t6
+
+  vnclipu.wi v8, v8, 1
+  vnclipu.wi v24, v24, 1
+
+.ifc \size, wide
+  srli t4, t6, 1
+  vsetvl zero, t4, t3
+.endif
+
+  vse8.v v8, (a6) # mask[x] = m + n + 1 - sign
+  srli t4, a4, 1
+  add t4, a6, t4
+  vse8.v v24, (t4) # mask[x] = m + n + 1 - sign
+  srli t4, t6, 1
+  add a6, a6, t4
+.elseif \type == 420
+  # v4, v20 = m
+  # v12, v28 = n
+  vnsrl.wi v4, v8, 0
+  vnsrl.wi v8, v8, 16
+
+  vnsrl.wi v20, v24, 0
+  vnsrl.wi v24, v24, 16
+
+  # v8 = m + n + mask[x >> 1]
+  vadd.vv v8, v4, v8
+  vadd.vv v24, v20, v24
+  vadd.vv v8, v8, v24
+  vsub.vx v8, v8, a7
+
+  vsetvl zero, zero, t3
+
+  vnclipu.wi v0, v0, 0
+  vnclipu.wi v16, v16, 0
+
+  vse8.v v0, (t0) # dst[x] =
+  add t4, t0, a1
+  vse8.v v16, (t4) # dst[x] =
+  add t0, t0, t6
+
+  vnclipu.wi v8, v8, 2
+
+  vse8.v v8, (a6) # mask[x] = (m + n + mask[x >> 1] + 2 - sign) >> 2;
+  srli t4, t6, 1
+  add a6, a6, t4
+.endif
+.endm
+
+w_mask_fn 444
+w_mask_fn 444 vl256_
+w_mask_fn 422
+w_mask_fn 422 vl256_
+w_mask_fn 420
+w_mask_fn 420 vl256_
diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn' 
'--exclude=.svnignore' old/dav1d-1.5.2/src/riscv/64/mc16.S 
new/dav1d-1.5.3/src/riscv/64/mc16.S
--- old/dav1d-1.5.2/src/riscv/64/mc16.S 2025-10-27 20:44:47.000000000 +0100
+++ new/dav1d-1.5.3/src/riscv/64/mc16.S 2025-12-31 15:50:45.000000000 +0100
@@ -27,6 +27,13 @@
 
 #include "src/riscv/asm.S"
 
+function blend_vl512_16bpc_rvv, export=1, ext=zbb
+  srai t0, a3, 3
+  ctz t0, t0
+  addi t0, t0, 0xc6
+  j L(blend_epilog)
+endfunc
+
 function blend_vl256_16bpc_rvv, export=1, ext=zbb
   ctz t0, a3
   addi t0, t0, 0xc4
@@ -39,7 +46,6 @@
 L(blend_epilog):
   csrw vxrm, zero
   andi t0, t0, 0xc7
-  li t1, 64
   ori t0, t0, 8
   add a6, a3, a3
   vsetvl zero, a3, t0
@@ -58,14 +64,16 @@
   vle16.v v0, (a0)
   add t0, a0, a1
   vle16.v v4, (t0)
-  vwmulu.vv v24, v8, v16
-  vwmulu.vv v8, v12, v20
-  vrsub.vx v16, v16, t1
-  vrsub.vx v20, v20, t1
-  vwmaccu.vv v24, v0, v16
-  vwmaccu.vv v8, v4, v20
-  vnclipu.wi v0, v24, 6
-  vnclipu.wi v4, v8, 6
+  vrsub.vx v16, v16, x0
+  vrsub.vx v20, v20, x0
+  vsub.vv  v8, v0, v8
+  vsub.vv  v12, v4, v12
+  vsll.vi  v16, v16, 9
+  vsll.vi  v20, v20, 9
+  vsmul.vv v8, v8, v16
+  vsmul.vv v12, v12, v20
+  vadd.vv  v0, v0, v8
+  vadd.vv  v4, v4, v12
   vse16.v v0, (a0)
   vse16.v v4, (t0)
   add a0, t0, a1
@@ -73,6 +81,13 @@
   ret
 endfunc
 
+function blend_v_vl512_16bpc_rvv, export=1, ext=zbb
+  srai t0, a3, 3
+  ctz t0, t0
+  addi t0, t0, 0xc6
+  j L(blend_v_epilog)
+endfunc
+
 function blend_v_vl256_16bpc_rvv, export=1, ext=zbb
   srai t0, a3, 2
   ctz t0, t0
@@ -93,10 +108,10 @@
   la t1, dav1d_obmc_masks
   add t1, t1, a3
   vle8.v v20, (t1)
-  li t0, 64
   vzext.vf2 v16, v20
   add a3, a3, a3
-  vrsub.vx v20, v16, t0
+  vrsub.vx v20, v16, x0
+  vsll.vi v20, v20, 9
 1:
   addi a4, a4, -2
   vle16.v v8, (a2)
@@ -106,12 +121,12 @@
   vle16.v v0, (a0)
   add t0, a0, a1
   vle16.v v4, (t0)
-  vwmulu.vv v24, v8, v16
-  vwmulu.vv v8, v12, v16
-  vwmaccu.vv v24, v0, v20
-  vwmaccu.vv v8, v4, v20
-  vnclipu.wi v0, v24, 6
-  vnclipu.wi v4, v8, 6
+  vsub.vv v8, v0, v8
+  vsub.vv v12, v4, v12
+  vsmul.vv v8, v8, v20
+  vsmul.vv v12, v12, v20
+  vadd.vv  v0, v0, v8
+  vadd.vv  v4, v4, v12
   vse16.v v0, (a0)
   vse16.v v4, (t0)
   add a0, t0, a1
diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn' 
'--exclude=.svnignore' old/dav1d-1.5.2/src/riscv/ipred.h 
new/dav1d-1.5.3/src/riscv/ipred.h
--- old/dav1d-1.5.2/src/riscv/ipred.h   2025-10-27 20:44:47.000000000 +0100
+++ new/dav1d-1.5.3/src/riscv/ipred.h   2025-12-31 15:50:45.000000000 +0100
@@ -33,6 +33,7 @@
 decl_cfl_pred_fn(BF(dav1d_ipred_cfl_top, rvv));
 decl_cfl_pred_fn(BF(dav1d_ipred_cfl_left, rvv));
 
+decl_angular_ipred_fn(BF(dav1d_ipred_v, rvv));
 decl_angular_ipred_fn(BF(dav1d_ipred_paeth, rvv));
 decl_angular_ipred_fn(BF(dav1d_ipred_smooth, rvv));
 decl_angular_ipred_fn(BF(dav1d_ipred_smooth_v, rvv));
@@ -52,6 +53,7 @@
     c->cfl_pred[TOP_DC_PRED ] = dav1d_ipred_cfl_top_8bpc_rvv;
     c->cfl_pred[LEFT_DC_PRED] = dav1d_ipred_cfl_left_8bpc_rvv;
 
+    c->intra_pred[VERT_PRED    ] = dav1d_ipred_v_8bpc_rvv;
     c->intra_pred[PAETH_PRED   ] = dav1d_ipred_paeth_8bpc_rvv;
     c->intra_pred[SMOOTH_PRED  ] = dav1d_ipred_smooth_8bpc_rvv;
     c->intra_pred[SMOOTH_V_PRED] = dav1d_ipred_smooth_v_8bpc_rvv;
diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn' 
'--exclude=.svnignore' old/dav1d-1.5.2/src/riscv/mc.h 
new/dav1d-1.5.3/src/riscv/mc.h
--- old/dav1d-1.5.2/src/riscv/mc.h      2025-10-27 20:44:47.000000000 +0100
+++ new/dav1d-1.5.3/src/riscv/mc.h      2025-12-31 15:50:45.000000000 +0100
@@ -36,12 +36,25 @@
 decl_blend_dir_fn(BF(dav1d_blend_h_vl256, rvv));
 decl_blend_dir_fn(BF(dav1d_blend_v_vl256, rvv));
 
+decl_blend_fn(BF(dav1d_blend_vl512, rvv));
+decl_blend_dir_fn(BF(dav1d_blend_h_vl512, rvv));
+decl_blend_dir_fn(BF(dav1d_blend_v_vl512, rvv));
+
 decl_avg_fn(BF(dav1d_avg, rvv));
 decl_w_avg_fn(BF(dav1d_w_avg, rvv));
 decl_mask_fn(BF(dav1d_mask, rvv));
 
+decl_w_mask_fn(BF(dav1d_w_mask_444, rvv));
+decl_w_mask_fn(BF(dav1d_w_mask_422, rvv));
+decl_w_mask_fn(BF(dav1d_w_mask_420, rvv));
+
+decl_w_mask_fn(BF(dav1d_w_mask_444_vl256, rvv));
+decl_w_mask_fn(BF(dav1d_w_mask_422_vl256, rvv));
+decl_w_mask_fn(BF(dav1d_w_mask_420_vl256, rvv));
+
 decl_warp8x8_fn(BF(dav1d_warp_8x8, rvv));
 decl_warp8x8t_fn(BF(dav1d_warp_8x8t, rvv));
+decl_emu_edge_fn(BF(dav1d_emu_edge, rvv));
 
 static ALWAYS_INLINE void mc_dsp_init_riscv(Dav1dMCDSPContext *const c) {
   const unsigned flags = dav1d_get_cpu_flags();
@@ -56,12 +69,18 @@
     c->blend_v = BF(dav1d_blend_v_vl256, rvv);
   }
 
+  if (dav1d_get_vlen() >= 512) {
+    c->blend = BF(dav1d_blend_vl512, rvv);
+    c->blend_v = BF(dav1d_blend_v_vl512, rvv);
+  }
+
 #if BITDEPTH == 8
   c->blend_h = BF(dav1d_blend_h, rvv);
+  c->emu_edge = BF(dav1d_emu_edge, rvv);
 
-  if (dav1d_get_vlen() >= 256) {
-    c->blend_h = BF(dav1d_blend_h_vl256, rvv);
-  }
+  c->w_mask[0] = BF(dav1d_w_mask_444, rvv);
+  c->w_mask[1] = BF(dav1d_w_mask_422, rvv);
+  c->w_mask[2] = BF(dav1d_w_mask_420, rvv);
 
   c->avg     = BF(dav1d_avg, rvv);
   c->w_avg   = BF(dav1d_w_avg, rvv);
@@ -69,5 +88,16 @@
 
   c->warp8x8 = BF(dav1d_warp_8x8, rvv);
   c->warp8x8t = BF(dav1d_warp_8x8t, rvv);
+
+  if (dav1d_get_vlen() >= 256) {
+    c->blend_h = BF(dav1d_blend_h_vl256, rvv);
+
+    c->w_mask[0] = BF(dav1d_w_mask_444_vl256, rvv);
+    c->w_mask[1] = BF(dav1d_w_mask_422_vl256, rvv);
+    c->w_mask[2] = BF(dav1d_w_mask_420_vl256, rvv);
+  }
+  if (dav1d_get_vlen() >= 512) {
+    c->blend_h = BF(dav1d_blend_h_vl512, rvv);
+  }
 #endif
 }
diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn' 
'--exclude=.svnignore' old/dav1d-1.5.2/tests/checkasm/arm/checkasm_32.S 
new/dav1d-1.5.3/tests/checkasm/arm/checkasm_32.S
--- old/dav1d-1.5.2/tests/checkasm/arm/checkasm_32.S    2025-10-27 
20:44:47.000000000 +0100
+++ new/dav1d-1.5.3/tests/checkasm/arm/checkasm_32.S    2025-12-31 
15:50:45.000000000 +0100
@@ -185,11 +185,7 @@
 2:
         movrel          r0, error_message_gpr
 1:
-#ifdef PREFIX
-        bl              _checkasm_fail_func
-#else
-        bl              checkasm_fail_func
-#endif
+        bl              X(fail_func)
 0:
         pop             {r0, r1}
 .ifc \variant, vfp
diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn' 
'--exclude=.svnignore' old/dav1d-1.5.2/tests/checkasm/arm/checkasm_64.S 
new/dav1d-1.5.3/tests/checkasm/arm/checkasm_64.S
--- old/dav1d-1.5.2/tests/checkasm/arm/checkasm_64.S    2025-10-27 
20:44:47.000000000 +0100
+++ new/dav1d-1.5.3/tests/checkasm/arm/checkasm_64.S    2025-12-31 
15:50:45.000000000 +0100
@@ -190,11 +190,7 @@
 2:
         movrel          x0, error_message_stack
 1:
-#ifdef PREFIX
-        bl              _checkasm_fail_func
-#else
-        bl              checkasm_fail_func
-#endif
+        bl              X(fail_func)
 0:
         ldp             x0,  x1,  [sp], #16
         ldp             d14, d15, [sp], #16
diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn' 
'--exclude=.svnignore' old/dav1d-1.5.2/tests/checkasm/checkasm.c 
new/dav1d-1.5.3/tests/checkasm/checkasm.c
--- old/dav1d-1.5.2/tests/checkasm/checkasm.c   2025-10-27 20:44:47.000000000 
+0100
+++ new/dav1d-1.5.3/tests/checkasm/checkasm.c   2025-12-31 15:50:45.000000000 
+0100
@@ -644,7 +644,7 @@
     return (unsigned) mach_absolute_time();
 #else
     struct timespec ts;
-    clock_gettime(CLOCK_MONOTONIC, &ts);
+    clock_gettime(CLOCK_REALTIME, &ts);
     return (unsigned) (1000000000ULL * ts.tv_sec + ts.tv_nsec);
 #endif
 }
diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn' 
'--exclude=.svnignore' old/dav1d-1.5.2/tests/checkasm/itx.c 
new/dav1d-1.5.3/tests/checkasm/itx.c
--- old/dav1d-1.5.2/tests/checkasm/itx.c        2025-10-27 20:44:47.000000000 
+0100
+++ new/dav1d-1.5.3/tests/checkasm/itx.c        2025-12-31 15:50:45.000000000 
+0100
@@ -266,7 +266,7 @@
     for (int bpc = bpc_min; bpc <= bpc_max; bpc += 2) {
         bitfn(dav1d_itx_dsp_init)(c, bpc);
         for (enum TxfmType txtp = 0; txtp < N_TX_TYPES_PLUS_LL; txtp++)
-            for (int subsh = 0; subsh < subsh_max; subsh++)
+            for (int subsh = !!txtp; subsh < subsh_max; subsh++)
                 if (check_func(c->itxfm_add[tx][txtp],
                                "inv_txfm_add_%dx%d_%s_%s_%d_%dbpc",
                                w, h, itx_1d_names[itx_1d_types[txtp][0]],
@@ -302,21 +302,27 @@
                               alternate(coeff[0], coeff[1]), max_eob 
HIGHBD_TAIL_SUFFIX);
                 }
     }
-    report("add_%dx%d", w, h);
 }
 
 void bitfn(checkasm_check_itx)(void) {
     static const uint8_t txfm_size_order[N_RECT_TX_SIZES] = {
-        TX_4X4,   RTX_4X8,  RTX_4X16,
-        RTX_8X4,  TX_8X8,   RTX_8X16,  RTX_8X32,
-        RTX_16X4, RTX_16X8, TX_16X16,  RTX_16X32, RTX_16X64,
-                  RTX_32X8, RTX_32X16, TX_32X32,  RTX_32X64,
-                            RTX_64X16, RTX_64X32, TX_64X64
+        TX_4X4,                                               // tx4
+        RTX_4X8,   RTX_8X4,   TX_8X8,                         // tx8
+        RTX_4X16,  RTX_16X4,  RTX_8X16,  RTX_16X8,  TX_16X16, // tx16
+        RTX_8X32,  RTX_32X8,  RTX_16X32, RTX_32X16, TX_32X32, // tx32
+        RTX_16X64, RTX_64X16, RTX_32X64, RTX_64X32, TX_64X64, // tx64
     };
 
     /* Zero unused function pointer elements. */
     Dav1dInvTxfmDSPContext c = { { { 0 } } };
 
-    for (int i = 0; i < N_RECT_TX_SIZES; i++)
-        check_itxfm_add(&c, txfm_size_order[i]);
+    int idx = 0, tx;
+    do {
+        do {
+            tx = txfm_size_order[idx++];
+            check_itxfm_add(&c, tx);
+        } while (tx >= N_TX_SIZES);
+        report("add_tx%d", 4 << tx);
+    } while (tx < N_TX_SIZES - 1);
+    assert(idx == N_RECT_TX_SIZES);
 }
diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn' 
'--exclude=.svnignore' old/dav1d-1.5.2/tests/seek_stress.c 
new/dav1d-1.5.3/tests/seek_stress.c
--- old/dav1d-1.5.2/tests/seek_stress.c 2025-10-27 20:44:47.000000000 +0100
+++ new/dav1d-1.5.3/tests/seek_stress.c 2025-12-31 15:50:45.000000000 +0100
@@ -62,7 +62,7 @@
     return (unsigned) mach_absolute_time();
 #elif HAVE_CLOCK_GETTIME
     struct timespec ts;
-    clock_gettime(CLOCK_MONOTONIC, &ts);
+    clock_gettime(CLOCK_REALTIME, &ts);
     return (unsigned) (1000000000ULL * ts.tv_sec + ts.tv_nsec);
 #endif
 }
diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn' 
'--exclude=.svnignore' old/dav1d-1.5.2/tools/input/ivf.c 
new/dav1d-1.5.3/tools/input/ivf.c
--- old/dav1d-1.5.2/tools/input/ivf.c   2025-10-27 20:44:47.000000000 +0100
+++ new/dav1d-1.5.3/tools/input/ivf.c   2025-12-31 15:50:45.000000000 +0100
@@ -104,6 +104,12 @@
         fseeko(c->f, sz, SEEK_CUR);
     }
 
+    if (*num_frames == 0) { /* Reading bailed early */
+        fprintf(stderr, "No frames read from %s\n", file);
+        fclose(c->f);
+        return -1;
+    }
+
     uint64_t fps_num = (uint64_t) timebase[0] * *num_frames;
     uint64_t fps_den = (uint64_t) timebase[1] * duration;
     if (fps_num && fps_den) { /* Reduce fraction */
diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn' 
'--exclude=.svnignore' old/dav1d-1.5.2/tools/meson.build 
new/dav1d-1.5.3/tools/meson.build
--- old/dav1d-1.5.2/tools/meson.build   2025-10-27 20:44:47.000000000 +0100
+++ new/dav1d-1.5.3/tools/meson.build   2025-12-31 15:50:45.000000000 +0100
@@ -31,6 +31,19 @@
     'input/section5.c',
 )
 
+dav1d_input_objs = static_library('dav1d_input',
+    dav1d_input_sources,
+
+    include_directories : dav1d_inc_dirs,
+    install : false,
+    build_by_default : false,
+)
+
+# Leave subdir if tools are disabled
+if not get_option('enable_tools')
+    subdir_done()
+endif
+
 dav1d_output_sources = files(
     'output/md5.c',
     'output/null.c',
@@ -47,18 +60,10 @@
         xxh3_found = true
     elif get_option('xxhash_muxer').enabled()
         # manual error since 'required' kw arg in has_header_symbol() was only 
added in meson 0.50
-        error( 'C symbol XXH3_createState not found in header xxhash.h')
+        error( 'Requested xxhash_muxer to be built, but no usable xxhash.h was 
found.')
     endif
 endif
 
-dav1d_input_objs = static_library('dav1d_input',
-    dav1d_input_sources,
-
-    include_directories : dav1d_inc_dirs,
-    install : false,
-    build_by_default : false,
-)
-
 dav1d_output_objs = static_library('dav1d_output',
     dav1d_output_sources,
 
@@ -67,13 +72,6 @@
     build_by_default : false,
 )
 
-
-# Leave subdir if tools are disabled
-if not get_option('enable_tools')
-    subdir_done()
-endif
-
-
 #
 # Build definition for the dav1d tools
 #

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