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Hello community,

here is the log from the commit of package asl for openSUSE:Factory checked in 
at 2026-06-01 18:01:37
++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
Comparing /work/SRC/openSUSE:Factory/asl (Old)
 and      /work/SRC/openSUSE:Factory/.asl.new.1937 (New)
++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++

Package is "asl"

Mon Jun  1 18:01:37 2026 rev:35 rq:1356224 version:1.42_bld307

Changes:
--------
--- /work/SRC/openSUSE:Factory/asl/asl.changes  2026-05-30 22:57:06.457743023 
+0200
+++ /work/SRC/openSUSE:Factory/.asl.new.1937/asl.changes        2026-06-01 
18:02:32.310664659 +0200
@@ -1,0 +2,6 @@
+Sun May 31 12:15:15 UTC 2026 - Martin Hauke <[email protected]>
+
+- Update to version 142-bld307
+  * Add register symbols for 8080/8085.
+
+-------------------------------------------------------------------

Old:
----
  asl-current-142-bld306.tar.bz2

New:
----
  asl-current-142-bld307.tar.bz2

++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++

Other differences:
------------------
++++++ asl.spec ++++++
--- /var/tmp/diff_new_pack.H4a00k/_old  2026-06-01 18:02:33.618718792 +0200
+++ /var/tmp/diff_new_pack.H4a00k/_new  2026-06-01 18:02:33.618718792 +0200
@@ -16,7 +16,7 @@
 #
 
 
-%define rev 306
+%define rev 307
 Name:           asl
 Version:        1.42_bld%{rev}
 Release:        0

++++++ asl-current-142-bld306.tar.bz2 -> asl-current-142-bld307.tar.bz2 ++++++
diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn' 
'--exclude=.svnignore' old/asl-current/asl.def new/asl-current/asl.def
--- old/asl-current/asl.def     2026-04-27 22:03:26.000000000 +0200
+++ new/asl-current/asl.def     2026-05-23 18:22:35.000000000 +0200
@@ -1,2 +1,2 @@
-STACKSIZE 31600
+STACKSIZE 31500
 
diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn' 
'--exclude=.svnignore' old/asl-current/asmallg.c new/asl-current/asmallg.c
--- old/asl-current/asmallg.c   2026-05-14 20:35:51.000000000 +0200
+++ new/asl-current/asmallg.c   2026-05-29 20:12:10.000000000 +0200
@@ -887,7 +887,15 @@
           WrLstLine(mess.p_str);
       }
       else if ((level != e_level_error) || 
!FindAndTakeExpectError(ErrNum_UserError))
-        WrErrorString(mess.p_str, "", level == e_level_warning, level == 
e_level_fatal, NULL, NULL);
+      {
+        char add[11];
+
+        if (NumericErrors)
+          as_snprintf(add, sizeof(add), " #%d", ErrNum_UserError);
+        else
+          *add = '\0';
+        WrErrorString(mess.p_str, add, level == e_level_warning, level == 
e_level_fatal, NULL, NULL);
+      }
     }
     as_nonz_dynstr_free(&mess);
   }
diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn' 
'--exclude=.svnignore' old/asl-current/asmif.c new/asl-current/asmif.c
--- old/asl-current/asmif.c     2026-05-10 12:56:01.000000000 +0200
+++ new/asl-current/asmif.c     2026-05-29 20:12:10.000000000 +0200
@@ -20,6 +20,7 @@
 #include "asmsub.h"
 #include "asmpars.h"
 #include "asmitree.h"
+#include "operator.h"
 #include "codevars.h"
 
 #include "asmif.h"
@@ -379,6 +380,9 @@
              case TempString:
                eq = (as_nonz_dynstr_cmp(&t.Contents.str, 
&FirstIfSave->SaveExpr.Contents.str) == 0);
                break;
+             case TempReg:
+               eq = !reg_cmp(&t, &FirstIfSave->SaveExpr);
+               break;
              default:
                eq = False;
                break;
diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn' 
'--exclude=.svnignore' old/asl-current/asmpars.c new/asl-current/asmpars.c
--- old/asl-current/asmpars.c   2026-05-10 12:56:01.000000000 +0200
+++ new/asl-current/asmpars.c   2026-05-29 20:12:10.000000000 +0200
@@ -2503,6 +2503,7 @@
         if (PassNo <= MaxSymPass)
         {
           pResult->Reg = 0;
+          pEvalResult->DataSize = ReqSize;
           pResult->Dissect = NULL;
           pResult->compare = NULL;
           Repass = True;
diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn' 
'--exclude=.svnignore' old/asl-current/asmsub.c new/asl-current/asmsub.c
--- old/asl-current/asmsub.c    2026-04-27 22:03:26.000000000 +0200
+++ new/asl-current/asmsub.c    2026-05-23 18:23:04.000000000 +0200
@@ -40,7 +40,7 @@
 
 #ifdef __TURBOC__
 #ifdef __DPMI16__
-#define STKSIZE 31900
+#define STKSIZE 31500
 #else
 #define STKSIZE 49152
 #endif
diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn' 
'--exclude=.svnignore' old/asl-current/changelog new/asl-current/changelog
--- old/asl-current/changelog   2026-05-23 17:10:15.000000000 +0200
+++ new/asl-current/changelog   2026-05-29 20:14:02.000000000 +0200
@@ -1,3 +1,7 @@
+2026-05-29 [1.42 Bld 307]
+
+- Addition    : Add register symbols for 8080/8085
+
 2026-05-23 [1.42 Bld 306]
 
 - Addition    : Preliminary support for TBIL (Contribution by
diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn' 
'--exclude=.svnignore' old/asl-current/code68.c new/asl-current/code68.c
--- old/asl-current/code68.c    2026-05-23 12:22:39.000000000 +0200
+++ new/asl-current/code68.c    2026-05-29 20:11:50.000000000 +0200
@@ -169,23 +169,24 @@
 
 /*---------------------------------------------------------------------------*/
 
-static Boolean DecodeAcc(const char *pArg, Byte *pReg)
+static Boolean IsAcc(char Arg, Byte *pReg)
 {
   static const char Regs[] = "AB";
+  const char *pPos = strchr(Regs, as_toupper(Arg));
 
-  if (strlen(pArg) == 1)
+  if (pPos)
   {
-    const char *pPos = strchr(Regs, as_toupper(*pArg));
-
-    if (pPos)
-    {
-      *pReg = pPos - Regs;
-      return True;
-    }
+    *pReg = pPos - Regs;
+    return True;
   }
   return False;
 }
 
+static Boolean DecodeAcc(const char *pArg, Byte *pReg)
+{
+  return (strlen(pArg) == 1) ? IsAcc(*pArg, pReg) : False;
+}
+
 static void DecodeAdr(int StartInd, int StopInd, tSymbolSize op_size, Byte Erl)
 {
   tStrComp *pStartArg = &ArgStr[StartInd];
@@ -395,6 +396,31 @@
   }
 }
 
+/*!------------------------------------------------------------------------
+ * \fn     extract_acc_arg(const char *p_src_arg, Byte *p_acc_reg)
+ * \brief  decode accumulator name from (beginning of) source arg
+ * \param  p_src_arg source argument
+ * \param  p_acc_reg dest buffer for accumulator #
+ * \return NULL if no accumulator given, otherwise * to remainder of argument
+ * ------------------------------------------------------------------------ */
+
+static const char *extract_acc_arg(const char *p_src_arg, Byte *p_acc_reg)
+{
+  int l = strlen(p_src_arg);
+
+  if ((l >= 1)
+   && IsAcc(*p_src_arg, p_acc_reg)
+   && as_isspace_or_nul(p_src_arg[1]))
+  {
+    const char *p_remainder;
+
+    for (p_remainder = p_src_arg + 1; *p_remainder && 
as_isspace(*p_remainder); p_remainder++);
+    return p_remainder;
+  }
+  else
+    return NULL;
+}
+
 /*---------------------------------------------------------------------------*/
 
 static void DecodeFixed(Word Index)
@@ -665,36 +691,55 @@
 
 static void DecodeALU8(Word Code)
 {
-  Byte Reg;
-  int MinArgCnt = Hi(Code) & 3;
+  Byte acc_reg;
+  Boolean acc_set = False;
+  int MinArgCnt = Hi(Code) & 3, start_arg = 1;
 
-  /* dirty hack: LDA/STA/ORA, and first arg is not A or B, treat like 
LDAA/STAA/ORAA: */
+  /* Instruction already contains accumulator spec in mnemonic? */
+
+  if (MinArgCnt == 1)
+  {
+    acc_reg = (Code >> 14) & 1;
+    acc_set = True;
+  }
 
-  if ((MinArgCnt == 2)
-   && (as_toupper(OpPart.str.p_str[2]) == 'A')
-   && (ArgCnt >= 1)
-   && !DecodeAcc(ArgStr[1].str.p_str, &Reg))
-    MinArgCnt = 1;
+  /* If not, accumulator spec may be the first argument or a
+     'prefix' of it: */
 
-  if (ChkArgCnt(MinArgCnt, MinArgCnt + 1))
+  if (!acc_set && (ArgCnt >= 1))
   {
-    DecodeAdr(MinArgCnt, ArgCnt, eSymbolSize8Bit, ((Code & 0x8000) ? MModImm : 
0) | MModInd | MModExt | MModDir);
-    if (AdrMode != ModNone)
+    const char *p_remainder = extract_acc_arg(ArgStr[1].str.p_str, &acc_reg);
+
+    if (p_remainder)
     {
-      BAsmCode[PrefCnt] = Lo(Code) | (AdrPart << 4);
-      if (MinArgCnt == 1)
-      {
-        AdrMode = ModAcc;
-        AdrPart = (Code & 0x4000) >> 14;
-      }
+      acc_set = True;
+      if (!*p_remainder)
+        start_arg = 2;
       else
-        DecodeAdr(1, 1, eSymbolSizeUnknown, MModAcc);
-      if (AdrMode != ModNone)
-      {
-        BAsmCode[PrefCnt] |= AdrPart << 6;
-        CodeLen = PrefCnt + 1 + AdrCnt;
-        append_adr_vals(1 + PrefCnt);
-      }
+        StrCompCutLeft(&ArgStr[1], p_remainder - ArgStr[1].str.p_str);
+    }
+  }
+
+  /* No accumulator arg detected. if mnemonic ends on 'A' or, 'B', assume 
respective
+     accumulator: */
+
+  if (!acc_set && IsAcc(OpPart.str.p_str[2], &acc_reg))
+    acc_set = True;
+
+  if (!acc_set)
+  {
+    WrError(ErrNum_InvAddrMode);
+    return;
+  }
+
+  if (ChkArgCnt(start_arg, start_arg + 1))
+  {
+    DecodeAdr(start_arg, ArgCnt, eSymbolSize8Bit, ((Code & 0x8000) ? MModImm : 
0) | MModInd | MModExt | MModDir);
+    if (AdrMode != ModNone)
+    {
+      BAsmCode[PrefCnt] = Lo(Code) | (AdrPart << 4) | (acc_reg << 6);
+      append_adr_vals(1 + PrefCnt);
+      CodeLen = PrefCnt + 1 + AdrCnt;
     }
   }
 }
@@ -767,15 +812,16 @@
   AddInstTable(InstTable, NName, InstrZ++, DecodeRel);
 }
 
-static void AddALU8(const char *NamePlain, const char *NameA, const char 
*NameB, const char *NameB2, Boolean MayImm, Byte NCode)
+static void AddALU8(const char *p_name, Boolean MayImm, Byte NCode)
 {
+  char name[10];
   Word BaseCode = NCode | (MayImm ? 0x8000 : 0);
 
-  AddInstTable(InstTable, NamePlain, BaseCode | (2 << 8), DecodeALU8);
-  AddInstTable(InstTable, NameA, BaseCode | (1 << 8), DecodeALU8);
-  AddInstTable(InstTable, NameB, BaseCode | (1 << 8) | 0x4000, DecodeALU8);
-  if (NameB2)
-    AddInstTable(InstTable, NameB2, BaseCode | (1 << 8) | 0x4000, DecodeALU8);
+  AddInstTable(InstTable, p_name, BaseCode | (2 << 8), DecodeALU8);
+  as_snprintf(name, sizeof(name), "%sA", p_name);
+  AddInstTable(InstTable, name, BaseCode | (1 << 8), DecodeALU8);
+  as_snprintf(name, sizeof(name), "%sB", p_name);
+  AddInstTable(InstTable, name, BaseCode | (1 << 8) | 0x4000, DecodeALU8);
 }
 
 static void AddALU16(const char *NName, Boolean NMay, CPUVar NMin, Byte 
NShift, Byte NCode)
@@ -788,16 +834,20 @@
   AddInstTable(InstTable, NName, InstrZ++, DecodeALU16);
 }
 
-static void AddSing8(const char *NamePlain, const char *NameA, const char 
*NameB, Byte NCode)
+static void AddSing8(const char *p_name, Byte NCode)
 {
-  AddInstTable(InstTable, NamePlain, NCode, DecodeSing8);
-  AddInstTable(InstTable, NameA, NCode | 0, DecodeSing8_Acc);
-  AddInstTable(InstTable, NameB, NCode | 0x10, DecodeSing8_Acc);
+  char name[10];
+  AddInstTable(InstTable, p_name, NCode, DecodeSing8);
+  as_snprintf(name, sizeof(name), "%sA", p_name);
+  AddInstTable(InstTable, name, NCode | 0, DecodeSing8_Acc);
+  as_snprintf(name, sizeof(name), "%sB", p_name);
+  AddInstTable(InstTable, name, NCode | 0x10, DecodeSing8_Acc);
 }
 
 static void InitFields(void)
 {
   InstTable = CreateInstTable(317);
+  SetDynamicInstTable(InstTable);
 
   add_null_pseudo(InstTable);
 
@@ -857,17 +907,20 @@
   AddRel("BVC", CPU6800, 0x28);
   AddRel("BVS", CPU6800, 0x29);
 
-  AddALU8("ADC", "ADCA", "ADCB", NULL , True , 0x89);
-  AddALU8("ADD", "ADDA", "ADDB", NULL , True , 0x8b);
-  AddALU8("AND", "ANDA", "ANDB", NULL , True , 0x84);
-  AddALU8("BIT", "BITA", "BITB", NULL , True , 0x85);
-  AddALU8("CMP", "CMPA", "CMPB", NULL , True , 0x81);
-  AddALU8("EOR", "EORA", "EORB", NULL , True , 0x88);
-  AddALU8("LDA", "LDAA", "LDAB", "LDB", True , 0x86);
-  AddALU8("ORA", "ORAA", "ORAB", "ORB", True , 0x8a);
-  AddALU8("SBC", "SBCA", "SBCB", NULL , True , 0x82);
-  AddALU8("STA", "STAA", "STAB", "STB", False, 0x87);
-  AddALU8("SUB", "SUBA", "SUBB", NULL , True , 0x80);
+  AddALU8("ADC", True , 0x89);
+  AddALU8("ADD", True , 0x8b);
+  AddALU8("AND", True , 0x84);
+  AddALU8("BIT", True , 0x85);
+  AddALU8("CMP", True , 0x81);
+  AddALU8("EOR", True , 0x88);
+  AddALU8("LDA", True , 0x86);
+  AddInstTable(InstTable, "LDB", 0x86 | (1 << 8) | 0xc000, DecodeALU8);
+  AddALU8("ORA", True , 0x8a);
+  AddInstTable(InstTable, "ORB", 0x8a | (1 << 8) | 0xc000, DecodeALU8);
+  AddALU8("SBC", True , 0x82);
+  AddALU8("STA", False, 0x87);
+  AddInstTable(InstTable, "STB", 0x87 | (1 << 8) | 0xc000, DecodeALU8);
+  AddALU8("SUB", True , 0x80);
 
   InstrZ = 0;
   AddALU16("ADDD", True , CPU6801, 0, 0xc3);
@@ -887,18 +940,18 @@
   AddALU16("STY" , False, CPU6811, 3, 0xcf);
   AddALU16("SUBD", True , CPU6801, 0, 0x83);
 
-  AddSing8("ASL", "ASLA", "ASLB", 0x48);
-  AddSing8("ASR", "ASRA", "ASRB", 0x47);
-  AddSing8("CLR", "CLRA", "CLRB", 0x4f);
-  AddSing8("COM", "COMA", "COMB", 0x43);
-  AddSing8("DEC", "DECA", "DECB", 0x4a);
-  AddSing8("INC", "INCA", "INCB", 0x4c);
-  AddSing8("LSL", "LSLA", "LSLB", 0x48);
-  AddSing8("LSR", "LSRA", "LSRB", 0x44);
-  AddSing8("NEG", "NEGA", "NEGB", 0x40);
-  AddSing8("ROL", "ROLA", "ROLB", 0x49);
-  AddSing8("ROR", "RORA", "RORB", 0x46);
-  AddSing8("TST", "TSTA", "TSTB", 0x4d);
+  AddSing8("ASL", 0x48);
+  AddSing8("ASR", 0x47);
+  AddSing8("CLR", 0x4f);
+  AddSing8("COM", 0x43);
+  AddSing8("DEC", 0x4a);
+  AddSing8("INC", 0x4c);
+  AddSing8("LSL", 0x48);
+  AddSing8("LSR", 0x44);
+  AddSing8("NEG", 0x40);
+  AddSing8("ROL", 0x49);
+  AddSing8("ROR", 0x46);
+  AddSing8("TST", 0x4d);
 
   AddInstTable(InstTable, "PSH" , 0x36, DecodePSH_PUL);
   AddInstTable(InstTable, "PSHA", 0x36, DecodeSing8_Acc);
diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn' 
'--exclude=.svnignore' old/asl-current/code85.c new/asl-current/code85.c
--- old/asl-current/code85.c    2026-04-27 22:03:26.000000000 +0200
+++ new/asl-current/code85.c    2026-05-29 20:12:10.000000000 +0200
@@ -64,47 +64,166 @@
 
 /*---------------------------------------------------------------------------*/
 
-static const Byte AccReg = 7;
+/*!------------------------------------------------------------------------
+ * \fn     decode_reg8_core(const char *p_arg, tZ80Syntax syntax, Byte *p_ret)
+ * \brief  decode built-in 8 bit register names
+ * \param  p_arg source argument
+ * \param  syntax 808x and/or Z80 syntax?
+ * \param  p_ret encoded register
+ * \return True if valid register
+ * ------------------------------------------------------------------------ */
 
-static Boolean DecodeReg8(const char *Asc, tZ80Syntax Syntax, Byte *Erg)
+enum
 {
-  static const char RegNames[] = "BCDEHLMA";
-  const char *p;
+  HReg = 4,
+  MReg = 6,
+  AccReg = 7
+};
 
-  if (strlen(Asc) != 1) return False;
+static const char Reg8Names[] = "BCDEHLMA";
+
+static Boolean decode_reg8_core(const char *p_arg, tZ80Syntax syntax, Byte 
*p_ret)
+{
+  if (strlen(p_arg) != 1) return False;
   else
   {
-    p = strchr(RegNames, as_toupper(*Asc));
-    if (!p) return False;
+    const char *p_pos = strchr(Reg8Names, as_toupper(*p_arg));
+    if (!p_pos) return False;
     else
     {
-      *Erg = p - RegNames;
-      if ((!(Syntax & eSyntax808x)) && (*Erg == 6))
+      *p_ret = p_pos - Reg8Names;
+      if ((!(syntax & eSyntax808x)) && (*p_ret == MReg))
         return False;
       return True;
     }
   }
 }
 
-static const Byte BCReg = 0;
-static const Byte DEReg = 1;
-static const Byte HLReg = 2;
-static const Byte SPReg = 3;
+/*!------------------------------------------------------------------------
+ * \fn     decode_reg16_core(const char *p_arg, tZ80Syntax syntax, Byte *p_ret)
+ * \brief  decode built-in 16 bit register names
+ * \param  p_arg source argument
+ * \param  syntax 808x and/or Z80 syntax?
+ * \param  p_ret encoded register
+ * \return True if valid register
+ * ------------------------------------------------------------------------ */
+ 
+enum
+{
+  BCReg = 0,
+  DEReg = 1,
+  HLReg = 2,
+  SPReg = 3
+};
+
+static const char Reg16Names[7][3] = { "B", "D", "H", "SP", "BC", "DE", "HL" };
 
-static Boolean DecodeReg16(char *pAsc, tZ80Syntax Syntax, Byte *pResult)
+static Boolean decode_reg16_core(char *p_arg, tZ80Syntax syntax, Byte *p_ret)
 {
-  static const char RegNames[8][3] = { "B", "D", "H", "SP", "BC", "DE", "HL", 
"SP" };
 
-  for (*pResult = (Syntax & eSyntax808x) ? 0 : 4;
-       *pResult < ((Syntax & eSyntaxZ80) ? 8 : 4);
-       (*pResult)++)
-    if (!as_strcasecmp(pAsc, RegNames[*pResult]))
-    {
-      *pResult &= 3;
+  for (*p_ret = (syntax & eSyntax808x) ? 0 : 3;
+       *p_ret < ((syntax & eSyntaxZ80) ? 7 : 4);
+       (*p_ret)++)
+    if (!as_strcasecmp(p_arg, Reg16Names[*p_ret]))
+      return True;
+
+  return False;
+}
+
+/*!------------------------------------------------------------------------
+ * \fn     DissectReg_85(char *p_dest, size_t dest_size, tRegInt value, 
tSymbolSize inp_size)
+ * \brief  dissect register symbols - 808x variant
+ * \param  p_dest destination buffer
+ * \param  dest_size destination buffer size
+ * \param  value numeric register value
+ * \param  inp_size register size
+ * ------------------------------------------------------------------------ */
+       
+static void DissectReg_85(char *p_dest, size_t dest_size, tRegInt value, 
tSymbolSize inp_size)
+{
+  switch (inp_size)
+  {
+    case eSymbolSize8Bit:
+      if (value < 8)
+        as_snprintf(p_dest, dest_size, "%c", Reg8Names[value]);
+      else
+        goto none;
       break;
-    }
+    case eSymbolSize16Bit:
+      if (value < as_array_size(Reg16Names))
+        strmaxcpy(p_dest, Reg16Names[value], dest_size);
+      else
+        goto none;
+      break;
+    default:
+    none:
+      as_snprintf(p_dest, dest_size, "%d-%u", (int)inp_size, (unsigned)value);
+  }
+}
+
+/*!------------------------------------------------------------------------
+ * \fn     Boolean reg_8_to_16(tRegInt *p_reg)
+ * \brief  try to reinterprete 8 bit register (B/D/H) as 16 bit register
+ * \param  p_reg register # (in/out)
+ * \return True if reinterpretation was possible
+ * ------------------------------------------------------------------------ */
+
+static Boolean reg_8_to_16(tRegInt *p_reg)
+{
+  if (!(*p_reg & 1) && (*p_reg <= HReg))
+  {
+    *p_reg >>= 1;
+    return True;
+  }
+  else
+    return False;
+}
+
+/*!------------------------------------------------------------------------
+ * \fn     compare_reg_85(tRegInt reg1_num, tSymbolSize reg1_size, tRegInt 
reg2_num, tRegInt reg2_size)
+ * \brief  compare two register symbols
+ * \param  reg1_num 1st register's number
+ * \param  reg1_size 1st register's data size
+ * \param  reg2_num 2nd register's number
+ * \param  reg2_size 2nd register's data size
+ * \return 0, -1, 1, -2
+ * ------------------------------------------------------------------------ */
+ 
+static int compare_reg_85(tRegInt reg1_num, tSymbolSize size1, tRegInt 
reg2_num, tSymbolSize size2)
+{
+  /* B/D/H may also refer to a 16 bit register in 808x mode: */
 
-  return ((*pResult) < 4);
+  if (CurrZ80Syntax & eSyntax808x)
+  {
+    if ((size1 == eSymbolSize8Bit)
+     && (size2 == eSymbolSize16Bit)
+     && reg_8_to_16(&reg1_num))
+      size1 = eSymbolSize16Bit;
+    else if ((size2 == eSymbolSize8Bit)
+     && (size1 == eSymbolSize16Bit)
+     && reg_8_to_16(&reg2_num))
+      size2 = eSymbolSize16Bit;
+  }
+
+  /* Registers of unequal size are 'unordered': */
+
+  if ((size1 != size2) || ((size1 != eSymbolSize8Bit) && (size1 != 
eSymbolSize16Bit)))
+    return -2;
+
+  /* B<->BC, D<->DE and H<->HL should compare as equal: */
+
+  if (size1 == eSymbolSize16Bit)
+  {
+    reg1_num &= 3;
+    reg2_num &= 3;
+  }
+
+  if (reg1_num < reg2_num)
+    return -1;
+  else if (reg1_num > reg2_num)
+    return 1;
+  else
+    return 0;
 }
 
 static const char Conditions[][4] =
@@ -112,6 +231,80 @@
   "NZ", "Z", "NC", "C", "PO", "PE", "P", "M", "NX5", "X5"
 };
 
+static tRegEvalResult decode_reg(const tStrComp *p_arg, tZ80Syntax syntax, 
Byte *p_ret, tSymbolSize *p_size, tSymbolSize req_size, Boolean must_be_reg)
+{
+  tRegDescr reg_descr;
+  tEvalResult eval_result;
+  tRegEvalResult reg_eval_result;
+  Boolean take_8_as_16 = (CurrZ80Syntax & eSyntax808x) && (req_size == 
eSymbolSize16Bit);
+
+  if ((req_size != eSymbolSize16Bit) && decode_reg8_core(p_arg->str.p_str, 
syntax, p_ret))
+  {
+    reg_descr.Reg = *p_ret;
+    reg_eval_result = eIsReg;
+    eval_result.DataSize = eSymbolSize8Bit;
+  }
+  else if ((req_size != eSymbolSize8Bit) && 
decode_reg16_core(p_arg->str.p_str, syntax, p_ret))
+  {
+    reg_descr.Reg = *p_ret;
+    reg_eval_result = eIsReg;
+    eval_result.DataSize = eSymbolSize16Bit;
+  }
+  else
+  {
+    /* If 16 bit register is requested, we also search for 8 bit registers due 
to the B/D/H ambiguity: */
+
+    reg_eval_result = EvalStrRegExpressionAsOperand(p_arg, &reg_descr, 
&eval_result, take_8_as_16 ? eSymbolSizeUnknown : req_size, must_be_reg);
+    if (reg_eval_result == eIsReg)
+    {
+      if (take_8_as_16 && (eval_result.DataSize == eSymbolSize8Bit) && 
reg_8_to_16(&reg_descr.Reg))
+        eval_result.DataSize = eSymbolSize16Bit;
+      if (eval_result.DataSize != req_size)
+      {
+        WrStrErrorPos(ErrNum_InvOpSize, p_arg);
+        reg_eval_result = must_be_reg ? eIsNoReg : eRegAbort;
+      }
+    }
+    if (reg_eval_result == eIsReg)
+      *p_ret = reg_descr.Reg;
+  }
+ 
+  if (reg_eval_result == eIsReg)
+  {
+    /* operand size match */
+    if ((req_size == eSymbolSizeUnknown) || (eval_result.DataSize == 
req_size)) { }
+    /* allow 8 bit B/D/H as alias for BC/DE/HL in 808x mode */
+    else if (take_8_as_16 && (eval_result.DataSize == eSymbolSize8Bit) && 
reg_8_to_16(&reg_descr.Reg))
+    {
+      *p_ret = reg_descr.Reg;
+      eval_result.DataSize = eSymbolSize16Bit;
+    }
+    else
+    {
+      WrStrErrorPos(ErrNum_InvOpSize, p_arg);
+      reg_eval_result = must_be_reg ? eIsNoReg : eRegAbort;
+    }
+  }
+
+  /* For 16 bit, trim out 16 bit register alias flag */
+
+  if ((reg_eval_result == eIsReg) && (eval_result.DataSize == 
eSymbolSize16Bit))
+    *p_ret &= 3;
+ 
+  if (p_size) *p_size = eval_result.DataSize;
+  return reg_eval_result;
+}
+
+static Boolean decode_reg8(const tStrComp *p_arg, tZ80Syntax syntax, Byte 
*p_ret)
+{
+  return (decode_reg(p_arg, syntax, p_ret, NULL, eSymbolSize8Bit, True) == 
eIsReg);
+}
+
+static Boolean decode_reg16(const tStrComp *p_arg, tZ80Syntax syntax, Byte 
*p_ret)
+{
+  return (decode_reg(p_arg, syntax, p_ret, NULL, eSymbolSize16Bit, True) == 
eIsReg);
+}
+
 static Boolean DecodeCondition(const char *pAsc, Byte *pResult, Boolean WithX5)
 {
   int ConditionCnt = sizeof(Conditions) / sizeof(*Conditions);
@@ -140,32 +333,31 @@
   CodeLen += p_vals->count;
 }
 
-static tAdrMode DecodeAdr_Z80(tStrComp *pArg, adr_vals_t *p_vals, Word Mask)
+static tAdrMode DecodeAdr_Z80(tStrComp *pArg, adr_vals_t *p_vals, Word Mask, 
tZ80Syntax reg_syntax)
 {
   Boolean OK;
   tAdrMode AdrMode;
-  int ArgLen = strlen(pArg->str.p_str);
+  tSymbolSize reg_size;
 
   AdrMode = ModNone;
   reset_adr_vals(p_vals);
 
-  if (DecodeReg8(pArg->str.p_str, eSyntaxZ80, &p_vals->values[0]))
-  {
-    AdrMode = ModReg8;
-    goto AdrFound;
-  }
-
   if ((Mask & MModIM) && !as_strcasecmp(pArg->str.p_str, "IM"))
   {
     AdrMode = ModIM;
     goto AdrFound;
   }
 
-  if ((ArgLen == 2) && DecodeReg16(pArg->str.p_str, eSyntaxZ80, 
&p_vals->values[0]))
+  switch (decode_reg(pArg, reg_syntax, &p_vals->values[0], &reg_size, 
eSymbolSizeUnknown, False))
   {
-    AdrMode = ModReg16;
-    OpSize = eSymbolSize16Bit;
-    goto AdrFound;
+    case eIsReg:
+      AdrMode = (reg_size == eSymbolSize16Bit) ? ModReg16 : ModReg8;
+      OpSize = reg_size;
+      /* FALL-TRHU */
+    case eRegAbort:
+      goto AdrFound;
+    default:
+      break;
   }
 
   if (IsIndirect(pArg->str.p_str))
@@ -175,22 +367,26 @@
     StrCompRefRight(&IArg, pArg, 1);
     StrCompShorten(&IArg, 1);
 
-    if (DecodeReg16(IArg.str.p_str, eSyntaxZ80, &p_vals->values[0]))
+    switch (decode_reg(&IArg, eSyntaxZ80, &p_vals->values[0], NULL, 
eSymbolSize16Bit, False))
     {
-      AdrMode = ModIReg16;
-      goto AdrFound;
-    }
-    else
-    {
-      Word Addr = EvalStrIntExpressionWithFlags(&IArg, UInt16, &OK, 
&p_vals->flags);
-
-      if (OK)
+      case eIsReg:
+        AdrMode = ModIReg16;
+        goto AdrFound;
+      case eIsNoReg:
       {
-        p_vals->values[0] = Lo(Addr);
-        p_vals->values[1] = Hi(Addr);
-        p_vals->count = 2;
-        AdrMode = ModAbs;
+        Word Addr = EvalStrIntExpressionWithFlags(&IArg, UInt16, &OK, 
&p_vals->flags);
+
+        if (OK)
+        {
+          p_vals->values[0] = Lo(Addr);
+          p_vals->values[1] = Hi(Addr);
+          p_vals->count = 2;
+          AdrMode = ModAbs;
+        }
+        break;
       }
+      default:
+        return AdrMode;
     }
   }
   else if (OpSize == eSymbolSize16Bit)
@@ -287,10 +483,9 @@
 {
   Byte Reg;
 
-  if (!ChkArgCnt(1, 1));
-  else if (!ChkZ80Syntax((tZ80Syntax)Hi(Code)));
-  else if (!DecodeReg8(ArgStr[1].str.p_str, (tZ80Syntax)Hi(Code), &Reg)) 
WrStrErrorPos(ErrNum_InvRegName, &ArgStr[1]);
-  else
+  if (ChkArgCnt(1, 1)
+   && ChkZ80Syntax((tZ80Syntax)Hi(Code))
+   && decode_reg8(&ArgStr[1], (tZ80Syntax)Hi(Code), &Reg))
   {
     CodeLen = 1;
     BAsmCode[0] = Code + Reg;
@@ -303,11 +498,10 @@
 
   UNUSED(Index);
 
-  if (!ChkArgCnt(2,  2));
-  else if (!ChkZ80Syntax(eSyntax808x));
-  else if (!DecodeReg8(ArgStr[1].str.p_str, eSyntax808x, &Dest)) 
WrStrErrorPos(ErrNum_InvRegName, &ArgStr[1]);
-  else if (!DecodeReg8(ArgStr[2].str.p_str, eSyntax808x, BAsmCode + 0)) 
WrStrErrorPos(ErrNum_InvRegName, &ArgStr[2]);
-  else
+  if (ChkArgCnt(2,  2)
+   && ChkZ80Syntax(eSyntax808x)
+   && decode_reg8(&ArgStr[1], eSyntax808x, &Dest)
+   && decode_reg8(&ArgStr[2], eSyntax808x, BAsmCode + 0))
   {
     BAsmCode[0] += 0x40 + (Dest << 3);
     if (BAsmCode[0] == 0x76)
@@ -332,8 +526,7 @@
     BAsmCode[1] = EvalStrIntExpressionWithFlags(&ArgStr[2], Int8, &OK, &flags);
     if (OK)
     {
-      if (!DecodeReg8(ArgStr[1].str.p_str, eSyntax808x, &Reg)) 
WrStrErrorPos(ErrNum_InvRegName, &ArgStr[1]);
-      else
+      if (decode_reg8(&ArgStr[1], eSyntax808x, &Reg))
       {
         BAsmCode[0] = 0x06 + (Reg << 3);
         set_guessed(flags, 1, 1, 0xff);
@@ -359,8 +552,7 @@
     AdrWord = EvalStrIntExpressionWithFlags(&ArgStr[2], Int16, &OK, &flags);
     if (OK)
     {
-      if (!DecodeReg16(ArgStr[1].str.p_str, CurrZ80Syntax, &Reg)) 
WrStrErrorPos(ErrNum_InvRegName, &ArgStr[1]);
-      else
+      if (decode_reg16(&ArgStr[1], CurrZ80Syntax, &Reg))
       {
         BAsmCode[0] = 0x01 + (Reg << 4);
         set_guessed(flags, 1, 2, 0xff);
@@ -376,10 +568,9 @@
 {
   Byte Reg;
 
-  if (!ChkArgCnt(1, 1));
-  else if (!ChkZ80Syntax(eSyntax808x));
-  else if (!DecodeReg16(ArgStr[1].str.p_str, CurrZ80Syntax, &Reg)) 
WrStrErrorPos(ErrNum_InvRegName, &ArgStr[1]);
-  else
+  if (ChkArgCnt(1, 1)
+   && ChkZ80Syntax(eSyntax808x)
+   && decode_reg16(&ArgStr[1], CurrZ80Syntax, &Reg))
   {
     switch (Reg)
     {
@@ -421,13 +612,17 @@
         OK = True;
       }
     }
-    else if (DecodeReg16(ArgStr[1].str.p_str, CurrZ80Syntax, &Reg))
-      OK = (Reg != 3);
-    else
-      OK = False;
-    if (!OK) WrStrErrorPos(ErrNum_InvRegName, &ArgStr[1]);
     else
     {
+      OK = decode_reg16(&ArgStr[1], CurrZ80Syntax, &Reg);
+      if (Reg == SPReg)
+      {
+        WrStrErrorPos(ErrNum_InvReg, &ArgStr[1]);
+        OK = False;
+      }
+    }
+    if (OK)
+    {
       CodeLen = 1;
       BAsmCode[0] = 0xc1 + (Reg << 4) + Index;
     }
@@ -481,10 +676,9 @@
 {
   Byte Reg;
 
-  if (!ChkArgCnt(1, 1));
-  else if (!ChkZ80Syntax(eSyntax808x));
-  else if (!DecodeReg8(ArgStr[1].str.p_str, eSyntax808x, &Reg)) 
WrStrErrorPos(ErrNum_InvRegName, &ArgStr[1]);
-  else
+  if (ChkArgCnt(1, 1)
+   && ChkZ80Syntax(eSyntax808x)
+   && decode_reg8(&ArgStr[1], eSyntax808x, &Reg))
   {
     CodeLen = 1;
     BAsmCode[0] = 0x04 + (Reg << 3) + Index;
@@ -495,10 +689,9 @@
 {
   Byte Reg;
 
-  if (!ChkArgCnt(1, 1));
-  else if (!ChkZ80Syntax(eSyntax808x));
-  else if (!DecodeReg16(ArgStr[1].str.p_str, CurrZ80Syntax, &Reg)) 
WrStrErrorPos(ErrNum_InvRegName, &ArgStr[1]);
-  else
+  if (ChkArgCnt(1, 1)
+   && ChkZ80Syntax(eSyntax808x)
+   && decode_reg16(&ArgStr[1], CurrZ80Syntax, &Reg))
   {
     CodeLen = 1;
     BAsmCode[0] = 0x03 + (Reg << 4) + Index;
@@ -511,10 +704,9 @@
 
   UNUSED(Index);
 
-  if (!ChkArgCnt(1, 1));
-  else if (!ChkZ80Syntax(eSyntax808x));
-  else if (!DecodeReg16(ArgStr[1].str.p_str, CurrZ80Syntax, &Reg)) 
WrStrErrorPos(ErrNum_InvRegName, &ArgStr[1]);
-  else
+  if (ChkArgCnt(1, 1)
+   && ChkZ80Syntax(eSyntax808x)
+   && decode_reg16(&ArgStr[1], CurrZ80Syntax, &Reg))
   {
     CodeLen = 1;
     BAsmCode[0] = 0x09 + (Reg << 4);
@@ -528,10 +720,20 @@
   if (ChkArgCnt(0, 1) && ChkMinCPU(CPU8085U) && ChkZ80Syntax(eSyntax808x))
   {
     Byte Reg;
+    Boolean ok;
 
-    if ((ArgCnt == 1)
-     && (!DecodeReg16(ArgStr[1].str.p_str, CurrZ80Syntax, &Reg) || (Reg != 
BCReg))) WrStrErrorPos(ErrNum_InvRegName, &ArgStr[1]);
+    if (!ArgCnt)
+      ok = True;
+    else if (!decode_reg16(&ArgStr[1], CurrZ80Syntax, &Reg))
+      ok = False;
+    else if (Reg != BCReg)
+    {
+      WrStrErrorPos(ErrNum_InvRegName, &ArgStr[1]);
+      ok = False;
+    }
     else
+      ok = True;
+    if (ok)
     {
       CodeLen = 1;
       BAsmCode[0] = 0x08;
@@ -546,10 +748,20 @@
   if (ChkArgCnt(0, 1) && ChkMinCPU(CPU8085U) && ChkZ80Syntax(eSyntax808x))
   {
     Byte Reg;
+    Boolean ok;
 
-    if ((ArgCnt == 1)
-     && (!DecodeReg16(ArgStr[1].str.p_str, CurrZ80Syntax, &Reg) || (Reg != 
DEReg))) WrStrErrorPos(ErrNum_InvRegName, &ArgStr[1]);
+    if (!ArgCnt)
+      ok = True;
+    else if (!decode_reg16(&ArgStr[1], CurrZ80Syntax, &Reg))
+      ok = False;
+    else if (Reg != DEReg)
+    {
+      WrStrErrorPos(ErrNum_InvRegName, &ArgStr[1]);
+      ok = False;
+    }
     else
+      ok = True;
+    if (ok)
     {
       CodeLen = 1;
       BAsmCode[0] = Index ? 0xed: 0xd9;
@@ -570,7 +782,7 @@
     Mask = MModReg8 | MModIReg16 | MModAbs | MModReg16;
     if (MomCPU >= CPU8085)
       Mask |= MModIM;
-    switch (DecodeAdr_Z80(&ArgStr[1], &dest_adr_vals, Mask))
+    switch (DecodeAdr_Z80(&ArgStr[1], &dest_adr_vals, Mask, eSyntaxZ80))
     {
       case ModReg8:
         Mask = MModReg8 | MModIReg16 | MModImm;
@@ -580,7 +792,7 @@
           if (MomCPU >= CPU8085)
             Mask |= MModIM;
         }
-        switch (DecodeAdr_Z80(&ArgStr[2], &src_adr_vals, Mask))
+        switch (DecodeAdr_Z80(&ArgStr[2], &src_adr_vals, Mask, eSyntaxZ80))
         {
           case ModReg8:
             BAsmCode[CodeLen++] = 0x40 | (dest_adr_vals.values[0] << 3) | 
src_adr_vals.values[0];
@@ -620,7 +832,7 @@
         }
         if (dest_adr_vals.values[0] == SPReg)
           Mask |= MModReg16;
-        switch (DecodeAdr_Z80(&ArgStr[2], &src_adr_vals, Mask))
+        switch (DecodeAdr_Z80(&ArgStr[2], &src_adr_vals, Mask, eSyntaxZ80))
         {
           case ModImm:
             BAsmCode[CodeLen++] = 0x01 | (dest_adr_vals.values[0] << 4);
@@ -655,7 +867,7 @@
           Mask |= MModImm;
         if ((dest_adr_vals.values[0] == DEReg) && (MomCPU == CPU8085U))
           Mask |= MModReg16;
-        switch (DecodeAdr_Z80(&ArgStr[2], &src_adr_vals, Mask))
+        switch (DecodeAdr_Z80(&ArgStr[2], &src_adr_vals, Mask, eSyntaxZ80))
         {
           case ModReg8:
             if (dest_adr_vals.values[0] == HLReg)
@@ -681,7 +893,7 @@
         break;
       }
       case ModAbs:
-        switch (DecodeAdr_Z80(&ArgStr[2], &src_adr_vals, MModReg8 | MModReg16))
+        switch (DecodeAdr_Z80(&ArgStr[2], &src_adr_vals, MModReg8 | MModReg16, 
eSyntaxZ80))
         {
           case ModReg8:
             if (src_adr_vals.values[0] != AccReg) 
WrStrErrorPos(ErrNum_InvAddrMode, &ArgStr[2]);
@@ -704,7 +916,7 @@
         }
         break;
       case ModIM:
-        switch (DecodeAdr_Z80(&ArgStr[2], &src_adr_vals, MModReg8))
+        switch (DecodeAdr_Z80(&ArgStr[2], &src_adr_vals, MModReg8, eSyntaxZ80))
         {
           case ModReg8:
             if (src_adr_vals.values[0] != AccReg) 
WrStrErrorPos(ErrNum_InvAddrMode, &ArgStr[2]);
@@ -730,10 +942,10 @@
   {
     adr_vals_t dest_adr_vals, src_adr_vals;
 
-    switch (DecodeAdr_Z80(&ArgStr[1], &dest_adr_vals, MModReg16 | MModIReg16))
+    switch (DecodeAdr_Z80(&ArgStr[1], &dest_adr_vals, MModReg16 | MModIReg16, 
eSyntaxZ80))
     {
       case ModReg16:
-        switch (DecodeAdr_Z80(&ArgStr[2], &src_adr_vals, MModReg16 | 
MModIReg16))
+        switch (DecodeAdr_Z80(&ArgStr[2], &src_adr_vals, MModReg16 | 
MModIReg16, eSyntaxZ80))
         {
           case ModReg16:
             if (((dest_adr_vals.values[0] == DEReg) && (src_adr_vals.values[0] 
== HLReg))
@@ -753,7 +965,7 @@
         }
         break;
       case ModIReg16:
-        switch (DecodeAdr_Z80(&ArgStr[2], &src_adr_vals, MModReg16))
+        switch (DecodeAdr_Z80(&ArgStr[2], &src_adr_vals, MModReg16, 
eSyntaxZ80))
         {
           case ModReg16:
             if ((dest_adr_vals.values[0] == SPReg) && (src_adr_vals.values[0] 
== HLReg))
@@ -791,8 +1003,7 @@
     {
       Byte Reg;
 
-      if (!DecodeReg8(ArgStr[1].str.p_str, eSyntax808x, &Reg)) 
WrStrErrorPos(ErrNum_InvRegName, &ArgStr[1]);
-      else
+      if (decode_reg8(&ArgStr[1], eSyntax808x, &Reg))
         BAsmCode[CodeLen++] = 0x80 | Reg;
       break;
     }
@@ -800,13 +1011,13 @@
     {
       adr_vals_t dest_adr_vals, src_adr_vals;
 
-      switch (DecodeAdr_Z80(&ArgStr[1], &dest_adr_vals, MModReg8 | MModReg16))
+      switch (DecodeAdr_Z80(&ArgStr[1], &dest_adr_vals, MModReg8 | MModReg16, 
eSyntaxZ80))
       {
         case ModReg8:
           if (dest_adr_vals.values[0] != AccReg) 
WrStrErrorPos(ErrNum_InvAddrMode, &ArgStr[1]);
           else
           {
-            switch (DecodeAdr_Z80(&ArgStr[2], &src_adr_vals, MModReg8 | 
MModIReg16 | MModImm))
+            switch (DecodeAdr_Z80(&ArgStr[2], &src_adr_vals, MModReg8 | 
MModIReg16 | MModImm, eSyntaxZ80))
             {
               case ModReg8:
                 BAsmCode[CodeLen++] = 0x80 | src_adr_vals.values[0];
@@ -829,7 +1040,7 @@
           if (dest_adr_vals.values[0] != HLReg) 
WrStrErrorPos(ErrNum_InvAddrMode, &ArgStr[1]);
           else
           {
-            switch (DecodeAdr_Z80(&ArgStr[2], &src_adr_vals, MModReg16))
+            switch (DecodeAdr_Z80(&ArgStr[2], &src_adr_vals, MModReg16, 
eSyntaxZ80))
             {
               case ModReg16:
                 BAsmCode[CodeLen++] = 0x09 | (src_adr_vals.values[0] << 4);
@@ -848,8 +1059,10 @@
     {
       Byte Reg;
 
-      if (!DecodeReg16(ArgStr[1].str.p_str, CurrZ80Syntax, &Reg) || (Reg != 
DEReg)) WrStrErrorPos(ErrNum_InvAddrMode, &ArgStr[1]);
-      else if (!DecodeReg16(ArgStr[2].str.p_str, CurrZ80Syntax, &Reg) || (Reg 
< 2)) WrStrErrorPos(ErrNum_InvAddrMode, &ArgStr[2]);
+      if (!decode_reg16(&ArgStr[1], CurrZ80Syntax, &Reg));
+      else if (Reg != DEReg) WrStrErrorPos(ErrNum_InvAddrMode, &ArgStr[1]);
+      else if (!decode_reg16(&ArgStr[2], CurrZ80Syntax, &Reg));
+      else if (Reg < 2) WrStrErrorPos(ErrNum_InvAddrMode, &ArgStr[2]);
       else
       {
         Boolean OK;
@@ -881,8 +1094,7 @@
     {
       Byte Reg;
 
-      if (!DecodeReg8(ArgStr[1].str.p_str, eSyntax808x, &Reg)) 
WrStrErrorPos(ErrNum_InvRegName, &ArgStr[1]);
-      else
+      if (decode_reg8(&ArgStr[1], eSyntax808x, &Reg))
         BAsmCode[CodeLen++] = 0x88 | Reg;
       break;
     }
@@ -890,13 +1102,13 @@
     {
       adr_vals_t dest_adr_vals, src_adr_vals;
 
-      switch (DecodeAdr_Z80(&ArgStr[1], &dest_adr_vals, MModReg8))
+      switch (DecodeAdr_Z80(&ArgStr[1], &dest_adr_vals, MModReg8, eSyntaxZ80))
       {
         case ModReg8:
           if (dest_adr_vals.values[0] != AccReg) 
WrStrErrorPos(ErrNum_InvAddrMode, &ArgStr[1]);
           else
           {
-            switch (DecodeAdr_Z80(&ArgStr[2], &src_adr_vals, MModReg8 | 
MModIReg16 | MModImm))
+            switch (DecodeAdr_Z80(&ArgStr[2], &src_adr_vals, MModReg8 | 
MModIReg16 | MModImm, eSyntaxZ80))
             {
               case ModReg8:
                 BAsmCode[CodeLen++] = 0x88 | src_adr_vals.values[0];
@@ -925,7 +1137,6 @@
 
 static void DecodeSUB(Word Code)
 {
-  Byte Reg;
   tAdrMode AdrMode;
   adr_vals_t adr_vals;
 
@@ -940,7 +1151,7 @@
 
   if (ArgCnt == 2)
   {
-    switch ((AdrMode = DecodeAdr_Z80(&ArgStr[1], &adr_vals, MModReg8 | 
((MomCPU == CPU8085U) ? MModReg16 : 0))))
+    switch ((AdrMode = DecodeAdr_Z80(&ArgStr[1], &adr_vals, MModReg8 | 
((MomCPU == CPU8085U) ? MModReg16 : 0), eSyntaxZ80)))
     {
       case ModNone:
         return;
@@ -961,22 +1172,12 @@
   else
     AdrMode = ModReg8;
 
-  if (DecodeReg8(ArgStr[ArgCnt].str.p_str, CurrZ80Syntax, &Reg)) /* 808x style 
incl. M, Z80 style excl. (HL) */
-  {
-    BAsmCode[CodeLen++] = 0x90 | Reg;
-    return;
-  }
-
-  /* rest is Z80 style ( (HL) or immediate) */
-
-  if (!(CurrZ80Syntax & eSyntaxZ80))
-  {
-    WrError(ErrNum_InvAddrMode);
-    return;
-  }
-
-  switch (DecodeAdr_Z80(&ArgStr[ArgCnt], &adr_vals, MModImm | MModIReg16 | 
((AdrMode == ModReg16) ? MModReg16 : 0)))
+  switch (DecodeAdr_Z80(&ArgStr[ArgCnt], &adr_vals,
+                        ((CurrZ80Syntax & eSyntaxZ80) ? (MModImm | MModIReg16) 
: 0) | ((AdrMode == ModReg16) ? MModReg16 : MModReg8), CurrZ80Syntax))
   {
+    case ModReg8:
+      BAsmCode[CodeLen++] = 0x90 | adr_vals.values[0];
+      break;
     case ModReg16:
       if (adr_vals.values[0] != BCReg) WrStrErrorPos(ErrNum_InvAddrMode, 
&ArgStr[ArgCnt]);
       else
@@ -1006,7 +1207,7 @@
 
   if (ArgCnt == 2) /* A as dest */
   {
-    switch (DecodeAdr_Z80(&ArgStr[1], &adr_vals, MModReg8))
+    switch (DecodeAdr_Z80(&ArgStr[1], &adr_vals, MModReg8, eSyntaxZ80))
     {
       case ModNone:
         return;
@@ -1020,7 +1221,7 @@
     }
   }
 
-  switch (DecodeAdr_Z80(&ArgStr[ArgCnt], &adr_vals, MModImm | MModIReg16 | 
MModReg8))
+  switch (DecodeAdr_Z80(&ArgStr[ArgCnt], &adr_vals, MModImm | MModIReg16 | 
MModReg8, eSyntaxZ80))
   {
     case ModReg8:
       BAsmCode[CodeLen++] = 0x80 | (Code << 3) | adr_vals.values[0];
@@ -1046,7 +1247,7 @@
   {
     adr_vals_t adr_vals;
 
-    switch (DecodeAdr_Z80(&ArgStr[1], &adr_vals, MModReg8 | MModReg16 | 
MModIReg16))
+    switch (DecodeAdr_Z80(&ArgStr[1], &adr_vals, MModReg8 | MModReg16 | 
MModIReg16, eSyntaxZ80))
     {
       case ModReg8:
         BAsmCode[CodeLen++] = 0x04 | Code | (adr_vals.values[0] << 3);
@@ -1078,7 +1279,7 @@
 
   if (ArgCnt == 2) /* A as dest */
   {
-    switch (DecodeAdr_Z80(&ArgStr[1], &adr_vals, MModReg8))
+    switch (DecodeAdr_Z80(&ArgStr[1], &adr_vals, MModReg8, eSyntaxZ80))
     {
       case ModNone:
         return;
@@ -1098,7 +1299,7 @@
   else
     OpSize = (CurrZ80Syntax == eSyntaxZ80) ? eSymbolSize8Bit : 
eSymbolSize16Bit;
 
-  switch (DecodeAdr_Z80(&ArgStr[ArgCnt], &adr_vals, MModImm | ((CurrZ80Syntax 
& eSyntaxZ80) ? (MModIReg16 | MModReg8) : 0)))
+  switch (DecodeAdr_Z80(&ArgStr[ArgCnt], &adr_vals, MModImm | ((CurrZ80Syntax 
& eSyntaxZ80) ? (MModIReg16 | MModReg8) : 0), eSyntaxZ80))
   {
     case ModReg8:
       BAsmCode[CodeLen++] = 0xb8 | adr_vals.values[0];
@@ -1151,7 +1352,7 @@
     Condition = (CurrZ80Syntax == eSyntaxZ80) ? 0xff : 6 << 3;
 
   OpSize = eSymbolSize16Bit;
-  switch (DecodeAdr_Z80(&ArgStr[ArgCnt], &adr_vals, MModImm | (((ArgCnt == 1) 
&& (CurrZ80Syntax & eSyntaxZ80)) ? MModIReg16 : 0)))
+  switch (DecodeAdr_Z80(&ArgStr[ArgCnt], &adr_vals, MModImm | (((ArgCnt == 1) 
&& (CurrZ80Syntax & eSyntaxZ80)) ? MModIReg16 : 0), eSyntaxZ80))
   {
     case ModIReg16:
       if (adr_vals.values[0] != HLReg) WrStrErrorPos(ErrNum_InvAddrMode, 
&ArgStr[ArgCnt]);
@@ -1199,7 +1400,7 @@
   }
 
   OpSize = eSymbolSize16Bit;
-  switch (DecodeAdr_Z80(&ArgStr[ArgCnt], &adr_vals, MModImm | ((ArgCnt == 1) ? 
MModIReg16 : 0)))
+  switch (DecodeAdr_Z80(&ArgStr[ArgCnt], &adr_vals, MModImm | ((ArgCnt == 1) ? 
MModIReg16 : 0), eSyntaxZ80))
   {
     case ModIReg16:
       if (adr_vals.values[0] != HLReg) WrStrErrorPos(ErrNum_InvAddrMode, 
&ArgStr[ArgCnt]);
@@ -1235,7 +1436,7 @@
     Condition = 0xff;
 
   OpSize = eSymbolSize16Bit;
-  switch (DecodeAdr_Z80(&ArgStr[ArgCnt], &adr_vals, MModImm))
+  switch (DecodeAdr_Z80(&ArgStr[ArgCnt], &adr_vals, MModImm, eSyntaxZ80))
   {
     case ModImm:
       BAsmCode[CodeLen++] = (1 == ArgCnt) ? 0xcd : 0xc4 | Condition;
@@ -1275,7 +1476,7 @@
     adr_vals_t adr_vals;
     tStrComp *p_reg_arg = &ArgStr[Code == 0xdb ? 1 : 2];
 
-    switch (DecodeAdr_Z80(p_reg_arg, &adr_vals, MModReg8))
+    switch (DecodeAdr_Z80(p_reg_arg, &adr_vals, MModReg8, eSyntaxZ80))
     {
       case ModReg8:
         if (adr_vals.values[0] != AccReg)
@@ -1305,7 +1506,8 @@
   if (!ChkArgCnt(1, 1));
   else if (!ChkMinCPU(CPU8085U));
   else if (!ChkZ80Syntax(eSyntaxZ80));
-  else if (!DecodeReg16(ArgStr[1].str.p_str, CurrZ80Syntax, &Reg) || (Reg != 
HLReg)) WrStrErrorPos(ErrNum_InvAddrMode, &ArgStr[1]);
+  else if (!decode_reg16(&ArgStr[1], CurrZ80Syntax, &Reg));
+  else if (Reg != HLReg) WrStrErrorPos(ErrNum_InvAddrMode, &ArgStr[1]);
   else
    BAsmCode[CodeLen++] = Lo(Code);
 }
@@ -1324,7 +1526,8 @@
     {
       Byte Reg;
 
-      if (!DecodeReg16(ArgStr[1].str.p_str, CurrZ80Syntax, &Reg) || (Reg != 
DEReg)) WrStrErrorPos(ErrNum_InvAddrMode, &ArgStr[1]);
+      if (!decode_reg16(&ArgStr[1], CurrZ80Syntax, &Reg));
+      else if (Reg != DEReg) WrStrErrorPos(ErrNum_InvAddrMode, &ArgStr[1]);
       else
         BAsmCode[CodeLen++] = 0x18;
       break;
@@ -1535,6 +1738,7 @@
 
   AddZ80Syntax(InstTable);
   AddIntelPseudo(InstTable, eIntPseudoFlag_LittleEndian);
+  AddInstTable(InstTable, "REG" , 0, CodeREG);
 }
 
 static void DeinitFields(void)
@@ -1556,7 +1760,36 @@
 
 static Boolean IsDef_85(void)
 {
-  return Memo("PORT");
+  return Memo("PORT") || Memo("REG");
+}
+
+/*!------------------------------------------------------------------------
+ * \fn     InternSymbol_85(char *p_arg, TempResult *p_result)
+ * \brief  handle built-in (register) symbols for 808x
+ * \param  p_arg source argument
+ * \param  p_result result buffer
+ * ------------------------------------------------------------------------ */
+
+static void InternSymbol_85(char *p_arg, TempResult *p_result)
+{
+  Byte reg_num;
+
+  if (decode_reg8_core(p_arg, CurrZ80Syntax, &reg_num))
+  {
+    p_result->Typ = TempReg;
+    p_result->DataSize = eSymbolSize8Bit;
+    p_result->Contents.RegDescr.Reg = reg_num;
+    p_result->Contents.RegDescr.Dissect = DissectReg_85;
+    p_result->Contents.RegDescr.compare = compare_reg_85;
+  }
+  else if (decode_reg16_core(p_arg, CurrZ80Syntax, &reg_num))
+  {
+    p_result->Typ = TempReg;
+    p_result->DataSize = eSymbolSize16Bit;
+    p_result->Contents.RegDescr.Reg = reg_num;
+    p_result->Contents.RegDescr.Dissect = DissectReg_85;
+    p_result->Contents.RegDescr.compare = compare_reg_85;
+  }
 }
 
 static void SwitchFrom_85(void)
@@ -1584,6 +1817,8 @@
 
   MakeCode = MakeCode_85;
   IsDef = IsDef_85;
+  InternSymbol = InternSymbol_85;
+  DissectReg = DissectReg_85;
   SwitchFrom = SwitchFrom_85;
   InitFields();
 }
diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn' 
'--exclude=.svnignore' old/asl-current/doc_COM/pscpu.tex 
new/asl-current/doc_COM/pscpu.tex
--- old/asl-current/doc_COM/pscpu.tex   2026-05-14 16:30:34.000000000 +0200
+++ new/asl-current/doc_COM/pscpu.tex   2026-05-29 20:12:10.000000000 +0200
@@ -368,7 +368,7 @@
 {\tt\begin{tabbing}
 \hspace{3cm}\=\hspace{3cm}\=\hspace{3cm}\=\hspace{3cm}\=\kill
 DB         \> DD          \> DN          \> DO          \> DQ \\
-DS         \> DT          \> DW          \> PORT \\
+DS         \> DT          \> DW          \> PORT        \> REG \\
 \end{tabbing}}
 
 \subsubsection{Intel 8086/80186/NEC V20...V5x}
diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn' 
'--exclude=.svnignore' old/asl-current/doc_DE/as.tex 
new/asl-current/doc_DE/as.tex
--- old/asl-current/doc_DE/as.tex       2026-05-23 12:08:00.000000000 +0200
+++ new/asl-current/doc_DE/as.tex       2026-05-29 20:12:10.000000000 +0200
@@ -2547,8 +2547,8 @@
 
 {\em G"ultigkeit: PowerPC, M-Core, XGate, 4004/4040, MCS-48/(2)51, 8086,
      80C16x, AVR, XS1, Z8, KCPSM, Mico8, TMS340xx, MSP430(X), ST9, M16,
-     M16C, H8/300, H8/500, SH7x00, H16, i960, XA, 29K, TLCS-9000, KENBAK,
-     SC/MP, PDP-11, VAX}
+     M16C, H8/300, H8/500, SH7x00, H16, 8080/8085, Zx80, i960, XA, 29K,
+     TLCS-9000, KENBAK, SC/MP, PDP-11, VAX}
 
 Manchmal ist es erw"unscht, nicht nur einer Speicheradresse oder einer
 Konstanten, sondern auch einem Register einen symbolischen Namen zuzuweisen,
diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn' 
'--exclude=.svnignore' old/asl-current/doc_EN/as.tex 
new/asl-current/doc_EN/as.tex
--- old/asl-current/doc_EN/as.tex       2026-05-23 12:11:55.000000000 +0200
+++ new/asl-current/doc_EN/as.tex       2026-05-29 20:12:10.000000000 +0200
@@ -2475,8 +2475,8 @@
 
 {\em valid for: PowerPC, M-Core, XGate, 4004/4040, MCS-48/(2)51, 8086,
      80C16x, AVR, XS1, Z8, KCPSM, Mico8, TMS340xx, MSP430(X), ST9, M16,
-     M16C, H8/300, H8/500, SH7x00, H16, i960, XA, 29K, TLCS-9000, KENBAK,
-     SC/MP, PDP-11, VAX}
+     M16C, H8/300, H8/500, SH7x00, H16, 8080/8085, Zx80, i960, XA, 29K,
+     TLCS-9000, KENBAK, SC/MP, PDP-11, VAX}
 
 Sometimes it is desirable not only to assign symbolic names to memory
 addresses or constants, but also to a register, to emphasize its function
diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn' 
'--exclude=.svnignore' old/asl-current/operator.c new/asl-current/operator.c
--- old/asl-current/operator.c  2026-05-10 12:56:01.000000000 +0200
+++ new/asl-current/operator.c  2026-05-29 20:12:10.000000000 +0200
@@ -57,17 +57,16 @@
         while (0)
 
 /*!------------------------------------------------------------------------
- * \fn     reg_cmp(const tRegDescr *p_reg1, tSymbolSize data_size1,
-                   const tRegDescr *p_reg2, tSymbolSize data_size2)
+ * \fn     reg_cmp(const TempResult *p_val1, const TempResult *p_val2)
  * \brief  compare two register symbols
- * \param  p_reg1, p_reg2 registers to compare
+ * \param  p_val1, p_val2 registers to compare
  * \return -1 : reg1 < reg2
  *          0 : reg1 = reg2
  *         +1 : reg1 > reg2
  *         -2 : unequal, but no smaller/greater relation can be given
  * ------------------------------------------------------------------------ */
 
-static int reg_cmp(const TempResult *p_val1, const TempResult *p_val2)
+int reg_cmp(const TempResult *p_val1, const TempResult *p_val2)
 {
   tRegInt num1, num2;
 
diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn' 
'--exclude=.svnignore' old/asl-current/operator.h new/asl-current/operator.h
--- old/asl-current/operator.h  2026-04-27 22:03:27.000000000 +0200
+++ new/asl-current/operator.h  2026-05-29 20:12:10.000000000 +0200
@@ -35,4 +35,6 @@
 
 extern const as_operator_t operators[], *target_operators, no_operators[];
 
+extern int reg_cmp(const TempResult *p_val1, const TempResult *p_val2);
+
 #endif /* _OPERATOR_H */
diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn' 
'--exclude=.svnignore' old/asl-current/strutil.h new/asl-current/strutil.h
--- old/asl-current/strutil.h   2026-05-13 22:20:13.000000000 +0200
+++ new/asl-current/strutil.h   2026-05-29 20:11:50.000000000 +0200
@@ -120,4 +120,7 @@
 #define as_isalnum(c) (!!isalnum(__chartouint(c)))
 #define as_isalnum_ubar(c) (isalnum(__chartouint(c))||((c)=='_'))
 
+#define as_isspace_or_nul(c) \
+        (as_isspace(c) || ((c) == '\0'))
+
 #endif /* _STRUTIL_H */
diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn' 
'--exclude=.svnignore' old/asl-current/tests/t_85regsym/t_85regsym.asm 
new/asl-current/tests/t_85regsym/t_85regsym.asm
--- old/asl-current/tests/t_85regsym/t_85regsym.asm     1970-01-01 
01:00:00.000000000 +0100
+++ new/asl-current/tests/t_85regsym/t_85regsym.asm     2026-05-29 
20:12:10.000000000 +0200
@@ -0,0 +1,93 @@
+       cpu     8085
+       z80syntax on
+       page    0
+
+cnt    equ     b
+cnt_hi equ     b
+cnt_lo equ     c
+count  equ     bc
+src    equ     d
+src_hi equ     d
+src_lo equ     e
+source equ     de
+dest   equ     h
+dest_hi        equ     h
+dest_lo        equ     l
+destination equ        hl
+
+bswap  macro   reg,save
+       if      save
+        push   psw
+       endif
+       switch  reg
+       case    b
+       mov     a,b
+       mov     b,c
+       mov     c,a
+       case    d
+       mov     a,d
+       mov     d,e
+       mov     e,a
+       case    h
+       mov     a,h
+       mov     h,l
+       mov     l,a
+       elsecase
+       error   "unknown 16-bit register to swap"
+       endcase
+       if      save
+        pop    psw
+       endif
+       endm
+
+       bswap   b,true
+       bswap   d,true
+       bswap   h,true
+       bswap   bc,true
+       bswap   de,true
+       bswap   hl,true
+       bswap   cnt,true
+       bswap   src,true
+       bswap   dest,true
+       bswap   count,true
+       bswap   source,true
+       bswap   destination,true
+       expect  9990
+       bswap   l,true
+       endexpect
+
+       inx     b
+       inx     d
+       inx     h
+       inx     bc
+       inx     de
+       inx     hl
+       inx     cnt
+       inx     src
+       inx     dest
+       inx     count
+       inx     source
+       inx     destination
+
+       dcr     b
+       dcr     c
+       dcr     d
+       dcr     e
+       dcr     h
+       dcr     l
+       dcr     cnt_hi
+       dcr     cnt_lo
+       dcr     src_hi
+       dcr     src_lo
+       dcr     dest_hi
+       dcr     dest_lo
+
+       ld      a,(bc)
+       ld      a,(de)
+       ld      a,(hl)
+       ld      a,(cnt)
+       ld      a,(src)
+       ld      a,(dest)
+       ld      a,(count)
+       ld      a,(source)
+       ld      a,(dest)
diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn' 
'--exclude=.svnignore' old/asl-current/tests/t_85regsym/t_85regsym.doc 
new/asl-current/tests/t_85regsym/t_85regsym.doc
--- old/asl-current/tests/t_85regsym/t_85regsym.doc     1970-01-01 
01:00:00.000000000 +0100
+++ new/asl-current/tests/t_85regsym/t_85regsym.doc     2026-05-29 
20:12:10.000000000 +0200
@@ -0,0 +1,5 @@
++----------------------- Test Application 85REGSYM --------------------------+
+|                                                                            |
+|         This tests register symbol support one 8080/8085.                  |
+|                                                                            |
++----------------------------------------------------------------------------+
diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn' 
'--exclude=.svnignore' old/asl-current/tests/t_85regsym/t_85regsym.ori 
new/asl-current/tests/t_85regsym/t_85regsym.ori
--- old/asl-current/tests/t_85regsym/t_85regsym.ori     1970-01-01 
01:00:00.000000000 +0100
+++ new/asl-current/tests/t_85regsym/t_85regsym.ori     2026-05-29 
20:12:10.000000000 +0200
@@ -0,0 +1,4 @@
+�xAO��zS_��|eo��xAO��zS_��|eo��xAO��zS_��|eo��xAO��zS_��|eo���#### 
%- %-
+~
+~
+~
\ No newline at end of file
diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn' 
'--exclude=.svnignore' old/asl-current/version.h new/asl-current/version.h
--- old/asl-current/version.h   2026-05-23 17:10:28.000000000 +0200
+++ new/asl-current/version.h   2026-05-29 20:13:51.000000000 +0200
@@ -14,7 +14,7 @@
 
 #define AS_VERSION_MAJOR 1
 #define AS_VERSION_MINOR 42
-#define AS_VERSION_BUILD 306
+#define AS_VERSION_BUILD 307
 
 /* The standard C stringification magic: */
 

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