Script 'mail_helper' called by obssrc Hello community, here is the log from the commit of package crash for openSUSE:Factory checked in at 2023-04-20 16:25:58 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ Comparing /work/SRC/openSUSE:Factory/crash (Old) and /work/SRC/openSUSE:Factory/.crash.new.2023 (New) ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
Package is "crash" Thu Apr 20 16:25:58 2023 rev:185 rq:1080856 version:8.0.2 Changes: -------- --- /work/SRC/openSUSE:Factory/crash/crash.changes 2023-04-14 13:13:52.987840077 +0200 +++ /work/SRC/openSUSE:Factory/.crash.new.2023/crash.changes 2023-04-20 16:26:00.186923692 +0200 @@ -1,0 +2,31 @@ +Thu Apr 20 12:09:36 UTC 2023 - Petr TesaÅÃk <p...@tesarici.cz> + +- crash-define-EM_RISCV-fallback.patch: Provide a fallback + definition of EM_RISCV. + +------------------------------------------------------------------- +Thu Apr 20 11:56:49 UTC 2023 - Petr TesaÅÃk <p...@tesarici.cz> + +- Remove crash-Define-fallback-PN_XNUM.patch: No more compatibility + with SLE11. + +------------------------------------------------------------------- +Thu Apr 20 07:43:51 UTC 2023 - Petr TesaÅÃk <p...@tesarici.cz> + +- Enable build for 32-bit Arm and 32-bit IBM POWER. + +------------------------------------------------------------------- +Thu Apr 20 07:41:07 UTC 2023 - Petr TesaÅÃk <p...@tesarici.cz> + +- Add support for RISCV64: + * crash-Add-RISCV64-framework-code-support.patch + * crash-RISCV64-Make-crash-tool-enter-command-line-and-suppo.patch + * crash-RISCV64-Add-dis-command-support.patch + * crash-RISCV64-Add-irq-command-support.patch + * crash-RISCV64-Add-bt-command-support.patch + * crash-RISCV64-Add-help-r-command-support.patch + * crash-RISCV64-Add-help-m-M-command-support.patch + * crash-RISCV64-Add-mach-command-support.patch + * crash-RISCV64-Add-the-implementation-of-symbol-verify.patch + +------------------------------------------------------------------- Old: ---- crash-Define-fallback-PN_XNUM.patch New: ---- crash-Add-RISCV64-framework-code-support.patch crash-RISCV64-Add-bt-command-support.patch crash-RISCV64-Add-dis-command-support.patch crash-RISCV64-Add-help-m-M-command-support.patch crash-RISCV64-Add-help-r-command-support.patch crash-RISCV64-Add-irq-command-support.patch crash-RISCV64-Add-mach-command-support.patch crash-RISCV64-Add-the-implementation-of-symbol-verify.patch crash-RISCV64-Make-crash-tool-enter-command-line-and-suppo.patch crash-define-EM_RISCV-fallback.patch ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ Other differences: ------------------ ++++++ crash.spec ++++++ --- /var/tmp/diff_new_pack.k6UBgI/_old 2023-04-20 16:26:01.306928979 +0200 +++ /var/tmp/diff_new_pack.k6UBgI/_new 2023-04-20 16:26:01.310928999 +0200 @@ -55,6 +55,10 @@ %define build_kmp 0 %endif %endif +# kernel is missing on 32-bit ppc +%ifarch ppc +%define build_kmp 0 +%endif Name: crash URL: https://crash-utility.github.io/ @@ -91,10 +95,19 @@ Patch21: %{name}-allow-use-of-sadump-captured-KASLR-kernel.patch Patch23: %{name}-SLE15-SP1-With-Linux-4.19-rc1-up-MAX_PHYSMEM_BITS-to-128TB.patch Patch24: %{name}-SLE15-SP1-Fix-for-PPC64-kernel-virtual-address-translation-in.patch -Patch27: %{name}-Define-fallback-PN_XNUM.patch Patch30: %{name}-enable-zstd-support.patch Patch31: %{name}-extensions-rule-for-defs.patch Patch32: %{name}-EPPIC-extension-support-for-crash-8.x-gdb-10.x.patch +Patch33: %{name}-Add-RISCV64-framework-code-support.patch +Patch34: %{name}-RISCV64-Make-crash-tool-enter-command-line-and-suppo.patch +Patch35: %{name}-RISCV64-Add-dis-command-support.patch +Patch36: %{name}-RISCV64-Add-irq-command-support.patch +Patch37: %{name}-RISCV64-Add-bt-command-support.patch +Patch38: %{name}-RISCV64-Add-help-r-command-support.patch +Patch39: %{name}-RISCV64-Add-help-m-M-command-support.patch +Patch40: %{name}-RISCV64-Add-mach-command-support.patch +Patch41: %{name}-RISCV64-Add-the-implementation-of-symbol-verify.patch +Patch42: %{name}-define-EM_RISCV-fallback.patch Patch90: %{name}-sial-ps-2.6.29.diff Patch99: %{name}-usrmerge.patch BuildRequires: bison @@ -112,12 +125,9 @@ BuildRequires: libelf-devel BuildRequires: zlib-devel Requires: /usr/bin/nm -ExclusiveArch: %ix86 x86_64 ia64 s390 s390x ppc64 ppc64le alpha aarch64 -# Source code says it can do ppc32. Excluded here? -ExcludeArch: ppc +ExclusiveArch: %ix86 x86_64 ia64 s390 s390x ppc ppc64 ppc64le alpha aarch64 %arm riscv64 %if 0%{?build_kmp} BuildRequires: kernel-syms -%endif %ifarch x86_64 %if 0%{?suse_version} >= 1520 && 0%{?suse_version} < 1550 BuildRequires: kernel-syms-rt @@ -128,6 +138,7 @@ %endif BuildRequires: %kernel_module_package_buildreqs BuildRequires: module-init-tools +%endif %if 0%{?build_kmp} %suse_kernel_module_package -n crash -p %_sourcedir/%{name}-kmp-preamble um @@ -266,7 +277,6 @@ %patch23 -p1 %patch24 -p1 %endif -%patch27 -p1 %if %{have_snappy} %patch15 -p1 %endif @@ -281,6 +291,16 @@ %patch31 -p1 %patch32 -p1 +%patch33 -p1 +%patch34 -p1 +%patch35 -p1 +%patch36 -p1 +%patch37 -p1 +%patch38 -p1 +%patch39 -p1 +%patch40 -p1 +%patch41 -p1 +%patch42 -p1 ## SIAL patches cd sial-scripts-%{scripts_version} ++++++ crash-Add-RISCV64-framework-code-support.patch ++++++ ++++ 693 lines (skipped) ++++++ crash-RISCV64-Add-bt-command-support.patch ++++++ From: Xianting Tian <xianting.t...@linux.alibaba.com> Date: Thu, 20 Oct 2022 09:50:10 +0800 Subject: RISCV64: Add 'bt' command support Upstream: merged Git-commit: 0d9fcbe3803c684fbfee893837a94d3c8f377805 1, Add the implementation to get stack frame from active & inactive task's stack. 2, Add 'bt -l' command support get a line number associated with a current pc address. 3, Add 'bt -f' command support to display all stack data contained in a frame With the patch, we can get the backtrace, crash> bt PID: 113 TASK: ff6000000226c200 CPU: 0 COMMAND: "sh" #0 [ff20000010333b90] riscv_crash_save_regs at ffffffff800078f8 #1 [ff20000010333cf0] panic at ffffffff806578c6 #2 [ff20000010333d50] sysrq_reset_seq_param_set at ffffffff8038c03c #3 [ff20000010333da0] __handle_sysrq at ffffffff8038c604 #4 [ff20000010333e00] write_sysrq_trigger at ffffffff8038cae4 #5 [ff20000010333e20] proc_reg_write at ffffffff801b7ee8 #6 [ff20000010333e40] vfs_write at ffffffff80152bb2 #7 [ff20000010333e80] ksys_write at ffffffff80152eda #8 [ff20000010333ed0] sys_write at ffffffff80152f52 crash> bt -l PID: 113 TASK: ff6000000226c200 CPU: 0 COMMAND: "sh" #0 [ff20000010333b90] riscv_crash_save_regs at ffffffff800078f8 /buildroot/qemu_riscv64_virt_defconfig/build/linux-custom/arch/riscv/kernel/crash_save_regs.S: 47 #1 [ff20000010333cf0] panic at ffffffff806578c6 /buildroot/qemu_riscv64_virt_defconfig/build/linux-custom/kernel/panic.c: 276 ... ... crash> bt -f PID: 113 TASK: ff6000000226c200 CPU: 0 COMMAND: "sh" #0 [ff20000010333b90] riscv_crash_save_regs at ffffffff800078f8 [PC: ffffffff800078f8 RA: ffffffff806578c6 SP: ff20000010333b90 SIZE: 352] ff20000010333b90: ff20000010333bb0 ffffffff800078f8 ff20000010333ba0: ffffffff8008862c ff20000010333b90 ff20000010333bb0: ffffffff810dde38 ff6000000226c200 ff20000010333bc0: ffffffff8032be68 0720072007200720 ... ... Signed-off-by: Xianting Tian <xianting.t...@linux.alibaba.com> --- netdump.c | 13 +++ riscv64.c | 283 ++++++++++++++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 296 insertions(+) diff --git a/netdump.c b/netdump.c index 4ec12a0..01af145 100644 --- a/netdump.c +++ b/netdump.c @@ -42,6 +42,7 @@ static void get_netdump_regs_ppc64(struct bt_info *, ulong *, ulong *); static void get_netdump_regs_arm(struct bt_info *, ulong *, ulong *); static void get_netdump_regs_arm64(struct bt_info *, ulong *, ulong *); static void get_netdump_regs_mips(struct bt_info *, ulong *, ulong *); +static void get_netdump_regs_riscv(struct bt_info *, ulong *, ulong *); static void check_dumpfile_size(char *); static int proc_kcore_init_32(FILE *, int); static int proc_kcore_init_64(FILE *, int); @@ -2675,6 +2676,10 @@ get_netdump_regs(struct bt_info *bt, ulong *eip, ulong *esp) return get_netdump_regs_mips(bt, eip, esp); break; + case EM_RISCV: + get_netdump_regs_riscv(bt, eip, esp); + break; + default: error(FATAL, "support for ELF machine type %d not available\n", @@ -2931,6 +2936,8 @@ display_regs_from_elf_notes(int cpu, FILE *ofp) mips_display_regs_from_elf_notes(cpu, ofp); } else if (machine_type("MIPS64")) { mips64_display_regs_from_elf_notes(cpu, ofp); + } else if (machine_type("RISCV64")) { + riscv64_display_regs_from_elf_notes(cpu, ofp); } } @@ -3877,6 +3884,12 @@ get_netdump_regs_mips(struct bt_info *bt, ulong *eip, ulong *esp) machdep->get_stack_frame(bt, eip, esp); } +static void +get_netdump_regs_riscv(struct bt_info *bt, ulong *eip, ulong *esp) +{ + machdep->get_stack_frame(bt, eip, esp); +} + int is_partial_netdump(void) { diff --git a/riscv64.c b/riscv64.c index 2355dac..4c9b35b 100644 --- a/riscv64.c +++ b/riscv64.c @@ -33,6 +33,17 @@ static int riscv64_uvtop(struct task_context *tc, ulong vaddr, static int riscv64_kvtop(struct task_context *tc, ulong kvaddr, physaddr_t *paddr, int verbose); static void riscv64_cmd_mach(void); +static void riscv64_stackframe_init(void); +static void riscv64_back_trace_cmd(struct bt_info *bt); +static int riscv64_get_dumpfile_stack_frame(struct bt_info *bt, + ulong *nip, ulong *ksp); +static void riscv64_get_stack_frame(struct bt_info *bt, ulong *pcp, + ulong *spp); +static int riscv64_get_frame(struct bt_info *bt, ulong *pcp, + ulong *spp); +static void riscv64_display_full_frame(struct bt_info *bt, + struct riscv64_unwind_frame *current, + struct riscv64_unwind_frame *previous); static int riscv64_translate_pte(ulong, void *, ulonglong); static int riscv64_init_active_task_regs(void); static int riscv64_get_crash_notes(void); @@ -498,6 +509,275 @@ no_page: return FALSE; } +/* + * 'bt -f' command output + * Display all stack data contained in a frame + */ +static void +riscv64_display_full_frame(struct bt_info *bt, struct riscv64_unwind_frame *current, + struct riscv64_unwind_frame *previous) +{ + int i, u_idx; + ulong *up; + ulong words, addr; + char buf[BUFSIZE]; + + if (previous->sp < current->sp) + return; + + if (!(INSTACK(previous->sp, bt) && INSTACK(current->sp, bt))) + return; + + words = (previous->sp - current->sp) / sizeof(ulong) + 1; + addr = current->sp; + u_idx = (current->sp - bt->stackbase) / sizeof(ulong); + + for (i = 0; i < words; i++, u_idx++) { + if (!(i & 1)) + fprintf(fp, "%s %lx: ", i ? "\n" : "", addr); + + up = (ulong *)(&bt->stackbuf[u_idx*sizeof(ulong)]); + fprintf(fp, "%s ", format_stack_entry(bt, buf, *up, 0)); + addr += sizeof(ulong); + } + fprintf(fp, "\n"); +} + +static void +riscv64_stackframe_init(void) +{ + long task_struct_thread = MEMBER_OFFSET("task_struct", "thread"); + + /* from arch/riscv/include/asm/processor.h */ + long thread_reg_ra = MEMBER_OFFSET("thread_struct", "ra"); + long thread_reg_sp = MEMBER_OFFSET("thread_struct", "sp"); + long thread_reg_fp = MEMBER_OFFSET("thread_struct", "s"); + + if ((task_struct_thread == INVALID_OFFSET) || + (thread_reg_ra == INVALID_OFFSET) || + (thread_reg_sp == INVALID_OFFSET) || + (thread_reg_fp == INVALID_OFFSET) ) + error(FATAL, + "cannot determine thread_struct offsets\n"); + + ASSIGN_OFFSET(task_struct_thread_context_pc) = + task_struct_thread + thread_reg_ra; + ASSIGN_OFFSET(task_struct_thread_context_sp) = + task_struct_thread + thread_reg_sp; + ASSIGN_OFFSET(task_struct_thread_context_fp) = + task_struct_thread + thread_reg_fp; +} + +static void +riscv64_dump_backtrace_entry(struct bt_info *bt, struct syment *sym, + struct riscv64_unwind_frame *current, + struct riscv64_unwind_frame *previous, int level) +{ + const char *name = sym ? sym->name : "(invalid)"; + struct load_module *lm; + char *name_plus_offset = NULL; + struct syment *symp; + ulong symbol_offset; + char buf[BUFSIZE]; + + if (bt->flags & BT_SYMBOL_OFFSET) { + symp = value_search(current->pc, &symbol_offset); + + if (symp && symbol_offset) + name_plus_offset = + value_to_symstr(current->pc, buf, bt->radix); + } + + fprintf(fp, "%s#%d [%016lx] %s at %016lx", + level < 10 ? " " : "", + level, + current->sp, + name_plus_offset ? name_plus_offset : name, + current->pc); + + if (module_symbol(current->pc, NULL, &lm, NULL, 0)) + fprintf(fp, " [%s]", lm->mod_name); + + fprintf(fp, "\n"); + + /* + * 'bt -l', get a line number associated with a current pc address. + */ + if (bt->flags & BT_LINE_NUMBERS) { + get_line_number(current->pc, buf, FALSE); + if (strlen(buf)) + fprintf(fp, " %s\n", buf); + } + + /* bt -f */ + if (bt->flags & BT_FULL) { + fprintf(fp, " " + "[PC: %016lx RA: %016lx SP: %016lx SIZE: %ld]\n", + current->pc, + previous->pc, + current->sp, + previous->sp - current->sp); + riscv64_display_full_frame(bt, current, previous); + } +} + +/* + * Unroll a kernel stack. + */ +static void +riscv64_back_trace_cmd(struct bt_info *bt) +{ + struct riscv64_unwind_frame current, previous; + struct stackframe curr_frame; + int level = 0; + + if (bt->flags & BT_REGS_NOT_FOUND) + return; + + current.pc = bt->instptr; + current.sp = bt->stkptr; + current.fp = bt->frameptr; + + if (!INSTACK(current.sp, bt)) + return; + + for (;;) { + struct syment *symbol = NULL; + struct stackframe *frameptr; + ulong low, high; + ulong offset; + + if (CRASHDEBUG(8)) + fprintf(fp, "level %d pc %#lx sp %lx fp 0x%lx\n", + level, current.pc, current.sp, current.fp); + + /* Validate frame pointer */ + low = current.sp + sizeof(struct stackframe); + high = bt->stacktop; + if (current.fp < low || current.fp > high || current.fp & 0x7) { + if (CRASHDEBUG(8)) + fprintf(fp, "fp 0x%lx sp 0x%lx low 0x%lx high 0x%lx\n", + current.fp, current.sp, low, high); + return; + } + + symbol = value_search(current.pc, &offset); + if (!symbol) + return; + + frameptr = (struct stackframe *)current.fp - 1; + if (!readmem((ulong)frameptr, KVADDR, &curr_frame, + sizeof(curr_frame), "get stack frame", RETURN_ON_ERROR)) + return; + + previous.pc = curr_frame.ra; + previous.fp = curr_frame.fp; + previous.sp = current.fp; + + riscv64_dump_backtrace_entry(bt, symbol, ¤t, &previous, level++); + + current.pc = previous.pc; + current.fp = previous.fp; + current.sp = previous.sp; + + if (CRASHDEBUG(8)) + fprintf(fp, "next %d pc %#lx sp %#lx fp %lx\n", + level, current.pc, current.sp, current.fp); + } +} + +/* + * Get a stack frame combination of pc and ra from the most relevant spot. + */ +static void +riscv64_get_stack_frame(struct bt_info *bt, ulong *pcp, ulong *spp) +{ + ulong ksp = 0, nip = 0; + int ret = 0; + + if (DUMPFILE() && is_task_active(bt->task)) + ret = riscv64_get_dumpfile_stack_frame(bt, &nip, &ksp); + else + ret = riscv64_get_frame(bt, &nip, &ksp); + + if (!ret) + error(WARNING, "cannot determine starting stack frame for task %lx\n", + bt->task); + + if (pcp) + *pcp = nip; + if (spp) + *spp = ksp; +} + +/* + * Get the starting point for the active cpu in a diskdump. + */ +static int +riscv64_get_dumpfile_stack_frame(struct bt_info *bt, ulong *nip, ulong *ksp) +{ + const struct machine_specific *ms = machdep->machspec; + struct riscv64_register *regs; + ulong epc, sp; + + if (!ms->crash_task_regs) { + bt->flags |= BT_REGS_NOT_FOUND; + return FALSE; + } + + /* + * We got registers for panic task from crash_notes. Just return them. + */ + regs = &ms->crash_task_regs[bt->tc->processor]; + epc = regs->regs[RISCV64_REGS_EPC]; + sp = regs->regs[RISCV64_REGS_SP]; + + /* + * Set stack frame ptr. + */ + bt->frameptr = regs->regs[RISCV64_REGS_FP]; + + if (nip) + *nip = epc; + if (ksp) + *ksp = sp; + + bt->machdep = regs; + + return TRUE; +} + +/* + * Do the work for riscv64_get_stack_frame() for non-active tasks. + * Get SP and PC values for idle tasks. + */ +static int +riscv64_get_frame(struct bt_info *bt, ulong *pcp, ulong *spp) +{ + if (!bt->tc || !(tt->flags & THREAD_INFO)) + return FALSE; + + if (!readmem(bt->task + OFFSET(task_struct_thread_context_pc), + KVADDR, pcp, sizeof(*pcp), + "thread_struct.ra", + RETURN_ON_ERROR)) + return FALSE; + + if (!readmem(bt->task + OFFSET(task_struct_thread_context_sp), + KVADDR, spp, sizeof(*spp), + "thread_struct.sp", + RETURN_ON_ERROR)) + return FALSE; + + if (!readmem(bt->task + OFFSET(task_struct_thread_context_fp), + KVADDR, &bt->frameptr, sizeof(bt->frameptr), + "thread_struct.fp", + RETURN_ON_ERROR)) + return FALSE; + + return TRUE; +} + static int riscv64_vtop_4level_4k(ulong *pgd, ulong vaddr, physaddr_t *paddr, int verbose) { @@ -978,6 +1258,8 @@ riscv64_init(int when) machdep->uvtop = riscv64_uvtop; machdep->kvtop = riscv64_kvtop; machdep->cmd_mach = riscv64_cmd_mach; + machdep->get_stack_frame = riscv64_get_stack_frame; + machdep->back_trace = riscv64_back_trace_cmd; machdep->vmalloc_start = riscv64_vmalloc_start; machdep->processor_speed = riscv64_processor_speed; @@ -998,6 +1280,7 @@ riscv64_init(int when) case POST_GDB: machdep->section_size_bits = _SECTION_SIZE_BITS; machdep->max_physmem_bits = _MAX_PHYSMEM_BITS; + riscv64_stackframe_init(); riscv64_page_type_init(); if (!machdep->hz) -- 2.40.0 ++++++ crash-RISCV64-Add-dis-command-support.patch ++++++ From: Xianting Tian <xianting.t...@linux.alibaba.com> Date: Thu, 20 Oct 2022 09:50:08 +0800 Subject: RISCV64: Add 'dis' command support Upstream: merged Git-commit: b410e14f7865e8c0e28cf2fb7a0092e3a8735645 Use generic_dis_filter() function to support dis command implementation. With this patch, we can get the disassembled code, crash> dis __crash_kexec 0xffffffff80088580 <__crash_kexec>: addi sp,sp,-352 0xffffffff80088582 <__crash_kexec+2>: sd s0,336(sp) 0xffffffff80088584 <__crash_kexec+4>: sd s1,328(sp) 0xffffffff80088586 <__crash_kexec+6>: sd s2,320(sp) 0xffffffff80088588 <__crash_kexec+8>: addi s0,sp,352 0xffffffff8008858a <__crash_kexec+10>: sd ra,344(sp) 0xffffffff8008858c <__crash_kexec+12>: sd s3,312(sp) 0xffffffff8008858e <__crash_kexec+14>: sd s4,304(sp) 0xffffffff80088590 <__crash_kexec+16>: auipc s2,0x1057 0xffffffff80088594 <__crash_kexec+20>: addi s2,s2,-1256 0xffffffff80088598 <__crash_kexec+24>: ld a5,0(s2) 0xffffffff8008859c <__crash_kexec+28>: mv s1,a0 0xffffffff8008859e <__crash_kexec+30>: auipc a0,0xfff Signed-off-by: Xianting Tian <xianting.t...@linux.alibaba.com> --- riscv64.c | 1 + 1 file changed, 1 insertion(+) diff --git a/riscv64.c b/riscv64.c index d8de3d5..1e20a09 100644 --- a/riscv64.c +++ b/riscv64.c @@ -988,6 +988,7 @@ riscv64_init(int when) machdep->is_task_addr = riscv64_is_task_addr; machdep->get_smp_cpus = riscv64_get_smp_cpus; machdep->value_to_symbol = generic_machdep_value_to_symbol; + machdep->dis_filter = generic_dis_filter; machdep->show_interrupts = generic_show_interrupts; machdep->get_irq_affinity = generic_get_irq_affinity; machdep->init_kernel_pgd = NULL; /* pgd set by symbol_value("swapper_pg_dir") */ -- 2.40.0 ++++++ crash-RISCV64-Add-help-m-M-command-support.patch ++++++ From: Xianting Tian <xianting.t...@linux.alibaba.com> Date: Thu, 20 Oct 2022 09:50:12 +0800 Subject: RISCV64: Add 'help -m/M' command support Upstream: merged Git-commit: 6c281cd355c904ddb82cbb49278b925d2ed13365 Add riscv64_dump_machdep_table() implementation, display machdep_table. crash> help -m flags: 80 () kvbase: ff60000000000000 identity_map_base: ff60000000000000 pagesize: 4096 pageshift: 12 pagemask: fffffffffffff000 pageoffset: fff pgdir_shift: 48 ptrs_per_pgd: 512 ptrs_per_pte: 512 stacksize: 16384 hz: 250 memsize: 1071644672 (0x3fe00000) bits: 64 back_trace: riscv64_back_trace_cmd() processor_speed: riscv64_processor_speed() uvtop: riscv64_uvtop() kvtop: riscv64_kvtop() get_stack_frame: riscv64_get_stack_frame() get_stackbase: generic_get_stackbase() get_stacktop: generic_get_stacktop() translate_pte: riscv64_translate_pte() memory_size: generic_memory_size() vmalloc_start: riscv64_vmalloc_start() is_task_addr: riscv64_is_task_addr() verify_symbol: riscv64_verify_symbol() dis_filter: generic_dis_filter() dump_irq: generic_dump_irq() show_interrupts: generic_show_interrupts() get_irq_affinity: generic_get_irq_affinity() cmd_mach: riscv64_cmd_mach() get_smp_cpus: riscv64_get_smp_cpus() is_kvaddr: riscv64_is_kvaddr() is_uvaddr: riscv64_is_uvaddr() verify_paddr: generic_verify_paddr() init_kernel_pgd: NULL value_to_symbol: generic_machdep_value_to_symbol() line_number_hooks: NULL last_pgd_read: ffffffff810e9000 last_p4d_read: 81410000 last_pud_read: 81411000 last_pmd_read: 81412000 last_ptbl_read: 81415000 pgd: 560d586f3ab0 p4d: 560d586f4ac0 pud: 560d586f5ad0 pmd: 560d586f6ae0 ptbl: 560d586f7af0 section_size_bits: 27 max_physmem_bits: 56 sections_per_root: 0 machspec: 560d57d204a0 Signed-off-by: Xianting Tian <xianting.t...@linux.alibaba.com> --- riscv64.c | 60 ++++++++++++++++++++++++++++++++++++++++++++++++++++++- 1 file changed, 59 insertions(+), 1 deletion(-) diff --git a/riscv64.c b/riscv64.c index 6d1d3b5..5e8c7d1 100644 --- a/riscv64.c +++ b/riscv64.c @@ -132,7 +132,65 @@ riscv64_verify_symbol(const char *name, ulong value, char type) void riscv64_dump_machdep_table(ulong arg) { - /* TODO: */ + int others = 0; + + fprintf(fp, " flags: %lx (", machdep->flags); + if (machdep->flags & KSYMS_START) + fprintf(fp, "%sKSYMS_START", others++ ? "|" : ""); + fprintf(fp, ")\n"); + + fprintf(fp, " kvbase: %lx\n", machdep->kvbase); + fprintf(fp, " identity_map_base: %lx\n", machdep->identity_map_base); + fprintf(fp, " pagesize: %d\n", machdep->pagesize); + fprintf(fp, " pageshift: %d\n", machdep->pageshift); + fprintf(fp, " pagemask: %llx\n", machdep->pagemask); + fprintf(fp, " pageoffset: %lx\n", machdep->pageoffset); + fprintf(fp, " pgdir_shift: %ld\n", machdep->machspec->va_bits - 9); + fprintf(fp, " ptrs_per_pgd: %u\n", PTRS_PER_PGD); + fprintf(fp, " ptrs_per_pte: %d\n", PTRS_PER_PTE); + fprintf(fp, " stacksize: %ld\n", machdep->stacksize); + fprintf(fp, " hz: %d\n", machdep->hz); + fprintf(fp, " memsize: %ld (0x%lx)\n", + machdep->memsize, machdep->memsize); + fprintf(fp, " bits: %d\n", machdep->bits); + fprintf(fp, " back_trace: riscv64_back_trace_cmd()\n"); + fprintf(fp, " processor_speed: riscv64_processor_speed()\n"); + fprintf(fp, " uvtop: riscv64_uvtop()\n"); + fprintf(fp, " kvtop: riscv64_kvtop()\n"); + fprintf(fp, " get_stack_frame: riscv64_get_stack_frame()\n"); + fprintf(fp, " get_stackbase: generic_get_stackbase()\n"); + fprintf(fp, " get_stacktop: generic_get_stacktop()\n"); + fprintf(fp, " translate_pte: riscv64_translate_pte()\n"); + fprintf(fp, " memory_size: generic_memory_size()\n"); + fprintf(fp, " vmalloc_start: riscv64_vmalloc_start()\n"); + fprintf(fp, " is_task_addr: riscv64_is_task_addr()\n"); + fprintf(fp, " verify_symbol: riscv64_verify_symbol()\n"); + fprintf(fp, " dis_filter: generic_dis_filter()\n"); + fprintf(fp, " dump_irq: generic_dump_irq()\n"); + fprintf(fp, " show_interrupts: generic_show_interrupts()\n"); + fprintf(fp, " get_irq_affinity: generic_get_irq_affinity()\n"); + fprintf(fp, " cmd_mach: riscv64_cmd_mach()\n"); + fprintf(fp, " get_smp_cpus: riscv64_get_smp_cpus()\n"); + fprintf(fp, " is_kvaddr: riscv64_is_kvaddr()\n"); + fprintf(fp, " is_uvaddr: riscv64_is_uvaddr()\n"); + fprintf(fp, " verify_paddr: generic_verify_paddr()\n"); + fprintf(fp, " init_kernel_pgd: NULL\n"); + fprintf(fp, " value_to_symbol: generic_machdep_value_to_symbol()\n"); + fprintf(fp, " line_number_hooks: NULL\n"); + fprintf(fp, " last_pgd_read: %lx\n", machdep->last_pgd_read); + fprintf(fp, " last_p4d_read: %lx\n", machdep->machspec->last_p4d_read); + fprintf(fp, " last_pud_read: %lx\n", machdep->last_pud_read); + fprintf(fp, " last_pmd_read: %lx\n", machdep->last_pmd_read); + fprintf(fp, " last_ptbl_read: %lx\n", machdep->last_ptbl_read); + fprintf(fp, " pgd: %lx\n", (ulong)machdep->pgd); + fprintf(fp, " p4d: %lx\n", (ulong)machdep->machspec->p4d); + fprintf(fp, " pud: %lx\n", (ulong)machdep->pud); + fprintf(fp, " pmd: %lx\n", (ulong)machdep->pmd); + fprintf(fp, " ptbl: %lx\n", (ulong)machdep->ptbl); + fprintf(fp, " section_size_bits: %ld\n", machdep->section_size_bits); + fprintf(fp, " max_physmem_bits: %ld\n", machdep->max_physmem_bits); + fprintf(fp, " sections_per_root: %ld\n", machdep->sections_per_root); + fprintf(fp, " machspec: %lx\n", (ulong)machdep->machspec); } static ulong -- 2.40.0 ++++++ crash-RISCV64-Add-help-r-command-support.patch ++++++ From: Xianting Tian <xianting.t...@linux.alibaba.com> Date: Thu, 20 Oct 2022 09:50:11 +0800 Subject: RISCV64: Add 'help -r' command support Upstream: merged Git-commit: 5cfcdb4ebcb159c1c47b7c1805cd9b274ca27ff5 Add support form printing out the registers from the dump file. With the patch, we can get the regs, crash> help -r CPU 0: epc : 00ffffffa5537400 ra : ffffffff80088620 sp : ff2000001039bb90 gp : ffffffff810dde38 tp : ff60000002269600 t0 : ffffffff8032be5c t1 : 0720072007200720 t2 : 666666666666663c s0 : ff2000001039bcf0 s1 : 0000000000000000 a0 : ff2000001039bb98 a1 : 0000000000000001 a2 : 0000000000000010 a3 : 0000000000000000 a4 : 0000000000000000 a5 : ff60000001c7d000 a6 : 000000000000003c a7 : ffffffff8035c998 s2 : ffffffff810df0a8 s3 : ffffffff810df718 s4 : ff2000001039bb98 s5 : 0000000000000000 s6 : 0000000000000007 s7 : ffffffff80c4a468 s8 : 00fffffffde45410 s9 : 0000000000000007 s10: 00aaaaaad1640700 s11: 0000000000000001 t3 : ff60000001218f00 t4 : ff60000001218f00 t5 : ff60000001218000 t6 : ff2000001039b988 Signed-off-by: Xianting Tian <xianting.t...@linux.alibaba.com> --- riscv64.c | 38 ++++++++++++++++++++++++++++++++++++++ 1 file changed, 38 insertions(+) diff --git a/riscv64.c b/riscv64.c index 4c9b35b..6d1d3b5 100644 --- a/riscv64.c +++ b/riscv64.c @@ -1320,6 +1320,44 @@ riscv64_init(int when) void riscv64_display_regs_from_elf_notes(int cpu, FILE *ofp) { + const struct machine_specific *ms = machdep->machspec; + struct riscv64_register *regs; + + if (!ms->crash_task_regs) { + error(INFO, "registers not collected for cpu %d\n", cpu); + return; + } + + regs = &ms->crash_task_regs[cpu]; + if (!regs->regs[RISCV64_REGS_SP] && !regs->regs[RISCV64_REGS_EPC]) { + error(INFO, "registers not collected for cpu %d\n", cpu); + return; + } + + /* Print riscv64 32 regs */ + fprintf(ofp, + "epc : " REG_FMT " ra : " REG_FMT " sp : " REG_FMT "\n" + " gp : " REG_FMT " tp : " REG_FMT " t0 : " REG_FMT "\n" + " t1 : " REG_FMT " t2 : " REG_FMT " s0 : " REG_FMT "\n" + " s1 : " REG_FMT " a0 : " REG_FMT " a1 : " REG_FMT "\n" + " a2 : " REG_FMT " a3 : " REG_FMT " a4 : " REG_FMT "\n" + " a5 : " REG_FMT " a6 : " REG_FMT " a7 : " REG_FMT "\n" + " s2 : " REG_FMT " s3 : " REG_FMT " s4 : " REG_FMT "\n" + " s5 : " REG_FMT " s6 : " REG_FMT " s7 : " REG_FMT "\n" + " s8 : " REG_FMT " s9 : " REG_FMT " s10: " REG_FMT "\n" + " s11: " REG_FMT " t3 : " REG_FMT " t4 : " REG_FMT "\n" + " t5 : " REG_FMT " t6 : " REG_FMT "\n", + regs->regs[0], regs->regs[1], regs->regs[2], + regs->regs[3], regs->regs[4], regs->regs[5], + regs->regs[6], regs->regs[7], regs->regs[8], + regs->regs[9], regs->regs[10], regs->regs[11], + regs->regs[12], regs->regs[13], regs->regs[14], + regs->regs[15], regs->regs[16], regs->regs[17], + regs->regs[18], regs->regs[19], regs->regs[20], + regs->regs[21], regs->regs[22], regs->regs[23], + regs->regs[24], regs->regs[25], regs->regs[26], + regs->regs[27], regs->regs[28], regs->regs[29], + regs->regs[30], regs->regs[31]); } #else /* !RISCV64 */ -- 2.40.0 ++++++ crash-RISCV64-Add-irq-command-support.patch ++++++ From: Xianting Tian <xianting.t...@linux.alibaba.com> Date: Thu, 20 Oct 2022 09:50:09 +0800 Subject: RISCV64: Add irq command support Upstream: merged Git-commit: 67216c741c4ebe8494f74f1ceabff9cdafb67883 With the patch, we can get the irq info, crash> irq IRQ IRQ_DESC/_DATA IRQACTION NAME 0 (unused) (unused) 1 ff60000001329600 ff60000001d17180 "101000.rtc" 2 ff60000001329800 ff60000001d17680 "ttyS0" 3 ff60000001329a00 ff60000001c33c00 "virtio0" 4 ff60000001329c00 ff60000001c33f80 "virtio1" 5 ff6000000120f400 ff60000001216000 "riscv-timer" Signed-off-by: Xianting Tian <xianting.t...@linux.alibaba.com> --- riscv64.c | 1 + 1 file changed, 1 insertion(+) diff --git a/riscv64.c b/riscv64.c index 1e20a09..2355dac 100644 --- a/riscv64.c +++ b/riscv64.c @@ -989,6 +989,7 @@ riscv64_init(int when) machdep->get_smp_cpus = riscv64_get_smp_cpus; machdep->value_to_symbol = generic_machdep_value_to_symbol; machdep->dis_filter = generic_dis_filter; + machdep->dump_irq = generic_dump_irq; machdep->show_interrupts = generic_show_interrupts; machdep->get_irq_affinity = generic_get_irq_affinity; machdep->init_kernel_pgd = NULL; /* pgd set by symbol_value("swapper_pg_dir") */ -- 2.40.0 ++++++ crash-RISCV64-Add-mach-command-support.patch ++++++ From: Xianting Tian <xianting.t...@linux.alibaba.com> Date: Thu, 20 Oct 2022 09:50:13 +0800 Subject: RISCV64: Add 'mach' command support Upstream: merged Git-commit: 3f4714967961c2ca8b70dccb938a5258b6572d2b With the patch we can get some basic machine state information, crash> mach MACHINE TYPE: riscv64 MEMORY SIZE: 1 GB CPUS: 1 PROCESSOR SPEED: (unknown) HZ: 250 PAGE SIZE: 4096 KERNEL STACK SIZE: 16384 Signed-off-by: Xianting Tian <xianting.t...@linux.alibaba.com> --- riscv64.c | 45 ++++++++++++++++++++++++++++++++++++++++++++- 1 file changed, 44 insertions(+), 1 deletion(-) diff --git a/riscv64.c b/riscv64.c index 5e8c7d1..ff77e41 100644 --- a/riscv64.c +++ b/riscv64.c @@ -116,10 +116,53 @@ static void riscv64_get_struct_page_size(struct machine_specific *ms) } } +/* + * "mach" command output. + */ +static void +riscv64_display_machine_stats(void) +{ + struct new_utsname *uts; + char buf[BUFSIZE]; + ulong mhz; + + uts = &kt->utsname; + + fprintf(fp, " MACHINE TYPE: %s\n", uts->machine); + fprintf(fp, " MEMORY SIZE: %s\n", get_memory_size(buf)); + fprintf(fp, " CPUS: %d\n", get_cpus_to_display()); + fprintf(fp, " PROCESSOR SPEED: "); + if ((mhz = machdep->processor_speed())) + fprintf(fp, "%ld Mhz\n", mhz); + else + fprintf(fp, "(unknown)\n"); + fprintf(fp, " HZ: %d\n", machdep->hz); + fprintf(fp, " PAGE SIZE: %d\n", PAGESIZE()); + fprintf(fp, " KERNEL STACK SIZE: %ld\n", STACKSIZE()); +} + static void riscv64_cmd_mach(void) { - /* TODO: */ + int c; + + while ((c = getopt(argcnt, args, "cmo")) != EOF) { + switch (c) { + case 'c': + case 'm': + case 'o': + option_not_supported(c); + break; + default: + argerrs++; + break; + } + } + + if (argerrs) + cmd_usage(pc->curcmd, SYNOPSIS); + + riscv64_display_machine_stats(); } static int -- 2.40.0 ++++++ crash-RISCV64-Add-the-implementation-of-symbol-verify.patch ++++++ From: Xianting Tian <xianting.t...@linux.alibaba.com> Date: Thu, 20 Oct 2022 09:50:14 +0800 Subject: RISCV64: Add the implementation of symbol verify Upstream: merged Git-commit: 0d5ad129252a18a46d1818a68ed22b35c5234289 Verify the symbol to accept or reject a symbol from the kernel namelist. Signed-off-by: Xianting Tian <xianting.t...@linux.alibaba.com> --- riscv64.c | 15 ++++++++++++++- 1 file changed, 14 insertions(+), 1 deletion(-) diff --git a/riscv64.c b/riscv64.c index ff77e41..6b9a688 100644 --- a/riscv64.c +++ b/riscv64.c @@ -165,10 +165,23 @@ riscv64_cmd_mach(void) riscv64_display_machine_stats(); } +/* + * Accept or reject a symbol from the kernel namelist. + */ static int riscv64_verify_symbol(const char *name, ulong value, char type) { - /* TODO: */ + if (CRASHDEBUG(8) && name && strlen(name)) + fprintf(fp, "%08lx %s\n", value, name); + + if (!(machdep->flags & KSYMS_START)) { + if (STREQ(name, "_text") || STREQ(name, "_stext")) + machdep->flags |= KSYMS_START; + + return (name && strlen(name) && !STRNEQ(name, "__func__.") && + !STRNEQ(name, "__crc_")); + } + return TRUE; } -- 2.40.0 ++++++ crash-RISCV64-Make-crash-tool-enter-command-line-and-suppo.patch ++++++ ++++ 1287 lines (skipped) ++++++ crash-define-EM_RISCV-fallback.patch ++++++ From: Petr Tesarik <p...@tesarici.cz> Subject: Provide a fallback definition of EM_RISCV Upstream: never, compatibility with SLE12 Fix build if <elf.h> does not define EM_RISCV (yet). Signed-off-by: Petr Tesarik <p...@tesarici.cz> --- diskdump.h | 4 ++++ netdump.h | 4 ++++ ramdump.c | 4 ++++ symbols.c | 4 ++++ 4 files changed, 16 insertions(+) --- a/diskdump.h +++ b/diskdump.h @@ -19,6 +19,10 @@ #include <elf.h> +#ifndef EM_RISCV +#define EM_RISCV 243 +#endif + #define divideup(x, y) (((x) + ((y) - 1)) / (y)) #define round(x, y) (((x) / (y)) * (y)) --- a/netdump.h +++ b/netdump.h @@ -19,6 +19,10 @@ #include <elf.h> #include "vmcore.h" +#ifndef EM_RISCV +#define EM_RISCV 243 +#endif + #define MIN_NETDUMP_ELF32_HEADER_SIZE \ sizeof(Elf32_Ehdr)+sizeof(Elf32_Phdr)+sizeof(Elf32_Phdr) #define MIN_NETDUMP_ELF64_HEADER_SIZE \ --- a/ramdump.c +++ b/ramdump.c @@ -22,6 +22,10 @@ #include "defs.h" #include <elf.h> +#ifndef EM_RISCV +#define EM_RISCV 243 +#endif + struct ramdump_def { char *path; int rfd; --- a/symbols.c +++ b/symbols.c @@ -23,6 +23,10 @@ #endif #include "bfd.h" +#ifndef EM_RISCV +#define EM_RISCV 243 +#endif + static void store_symbols(bfd *, int, void *, long, unsigned int); static void store_sysmap_symbols(void); static ulong relocate(ulong, char *, int);
