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Hello community,
here is the log from the commit of package hwinfo for openSUSE:Factory checked
in at 2023-07-24 18:12:36
++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
Comparing /work/SRC/openSUSE:Factory/hwinfo (Old)
and /work/SRC/openSUSE:Factory/.hwinfo.new.1467 (New)
++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
Package is "hwinfo"
Mon Jul 24 18:12:36 2023 rev:193 rq:1099733 version:23.2
Changes:
--------
--- /work/SRC/openSUSE:Factory/hwinfo/hwinfo.changes 2023-07-06
18:28:33.879105876 +0200
+++ /work/SRC/openSUSE:Factory/.hwinfo.new.1467/hwinfo.changes 2023-07-24
18:13:14.977664479 +0200
@@ -1,0 +2,7 @@
+Thu Jul 20 11:51:26 UTC 2023 - wfe...@opensuse.org
+
+- merge gh#openSUSE/hwinfo#128
+- Add support for loongarch cpu
+- 23.2
+
+--------------------------------------------------------------------
Old:
----
hwinfo-23.1.tar.xz
New:
----
hwinfo-23.2.tar.xz
++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
Other differences:
------------------
++++++ hwinfo.spec ++++++
--- /var/tmp/diff_new_pack.Gn7CuU/_old 2023-07-24 18:13:15.557667892 +0200
+++ /var/tmp/diff_new_pack.Gn7CuU/_new 2023-07-24 18:13:15.561667916 +0200
@@ -17,7 +17,7 @@
Name: hwinfo
-Version: 23.1
+Version: 23.2
%define lname libhd%(echo "%version" | perl -pe 's{\\D.*}{}')
Release: 0
Summary: Hardware Library
++++++ hwinfo-23.1.tar.xz -> hwinfo-23.2.tar.xz ++++++
diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn'
'--exclude=.svnignore' old/hwinfo-23.1/Makefile new/hwinfo-23.2/Makefile
--- old/hwinfo-23.1/Makefile 2023-07-05 17:12:32.000000000 +0200
+++ new/hwinfo-23.2/Makefile 2023-07-20 13:51:26.000000000 +0200
@@ -24,6 +24,8 @@
ifeq "$(ARCH)" "x86_64"
LIBDIR ?= /usr/lib64
+else ifeq "$(ARCH)" "loongarch64"
+LIBDIR ?= /usr/lib64
else
LIBDIR ?= /usr/lib
endif
diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn'
'--exclude=.svnignore' old/hwinfo-23.1/VERSION new/hwinfo-23.2/VERSION
--- old/hwinfo-23.1/VERSION 2023-07-05 17:12:32.000000000 +0200
+++ new/hwinfo-23.2/VERSION 2023-07-20 13:51:26.000000000 +0200
@@ -1 +1 @@
-23.1
+23.2
diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn'
'--exclude=.svnignore' old/hwinfo-23.1/changelog new/hwinfo-23.2/changelog
--- old/hwinfo-23.1/changelog 2023-07-05 17:12:32.000000000 +0200
+++ new/hwinfo-23.2/changelog 2023-07-20 13:51:26.000000000 +0200
@@ -1,3 +1,7 @@
+2023-07-20: 23.2
+ - merge gh#openSUSE/hwinfo#128
+ - Add support for loongarch cpu
+
2023-07-05: 23.1
- merge gh#openSUSE/hwinfo#137
- adjust exported symbols to yast2-hardware-detection test case
diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn'
'--exclude=.svnignore' old/hwinfo-23.1/hwinfo.c new/hwinfo-23.2/hwinfo.c
--- old/hwinfo-23.1/hwinfo.c 2023-07-05 17:12:32.000000000 +0200
+++ new/hwinfo-23.2/hwinfo.c 2023-07-20 13:51:26.000000000 +0200
@@ -629,6 +629,9 @@
case arch_aarch64:
s = "AArch64";
break;
+ case arch_loongarch:
+ s = "LoongArch";
+ break;
case arch_riscv:
s = "RISC-V";
break;
diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn'
'--exclude=.svnignore' old/hwinfo-23.1/src/hd/cpu.c new/hwinfo-23.2/src/hd/cpu.c
--- old/hwinfo-23.1/src/hd/cpu.c 2023-07-05 17:12:32.000000000 +0200
+++ new/hwinfo-23.2/src/hd/cpu.c 2023-07-20 13:51:26.000000000 +0200
@@ -124,6 +124,12 @@
int old_format;
#endif
+#ifdef __loongarch__
+ char model_id[80], features[0x400];
+ unsigned cpu_revision, mhz;
+ double bogo;
+#endif
+
#ifdef __PPC__
char model_id[80], vendor_id[80], motherboard[80];
unsigned mhz, cache, family, model, stepping;
@@ -351,6 +357,47 @@
}
#endif /* __aarch64__ */
+#ifdef __loongarch__
+ *model_id = 0;
+ cpu_revision = mhz = 0;
+ bogo = 0;
+
+ for(sl = hd_data->cpu; sl; sl = sl->next) {
+ if(sscanf(sl->str, "Model Name : %79[^\n]", model_id) == 1) continue;
+ if(sscanf(sl->str, "CPU Revision : %d", &cpu_revision) == 1);
+ if(sscanf(sl->str, "CPU MHz : %u", &mhz) == 1);
+ if(sscanf(sl->str, "BogoMIPS : %lg", &bogo) == 1);
+ if(sscanf(sl->str, "Features : %1023[^\n]", features) == 1);
+ if(strstr(sl->str, "processor") == sl->str || !sl->next) {/* EOF */
+ if(*model_id) {
+ ct = new_mem(sizeof *ct);
+ ct->architecture = arch_loongarch;
+ ct->model = cpu_revision;
+ ct->bogo = bogo;
+ ct->clock = mhz;
+ hd_data->boot = boot_grub;
+
+ if(*model_id) ct->model_name = new_str(model_id);
+ hd = add_hd_entry(hd_data, __LINE__, 0);
+ hd->base_class.id = bc_internal;
+ hd->sub_class.id = sc_int_cpu;
+ hd->slot = cpus;
+ hd->detail = new_mem(sizeof *hd->detail);
+ hd->detail->type = hd_detail_cpu;
+ hd->detail->cpu.data = ct;
+ if(*features) {
+ ct->features = hd_split(',', features);
+ }
+
+ *model_id = 0;
+ mhz= 0;
+ bogo = 0;
+ cpus++;
+ }
+ }
+ }
+#endif /* loongarch */
+
#ifdef __sparc__
*cpu_id = *fpu_id = *promlib = *prom = *type = *mmu = 0;
cpus = cpus_active = 0;
diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn'
'--exclude=.svnignore' old/hwinfo-23.1/src/hd/hd.c new/hwinfo-23.2/src/hd/hd.c
--- old/hwinfo-23.1/src/hd/hd.c 2023-07-05 17:12:32.000000000 +0200
+++ new/hwinfo-23.2/src/hd/hd.c 2023-07-20 13:51:26.000000000 +0200
@@ -3148,6 +3148,9 @@
#ifdef __arm__
return arch_arm;
#else
+#ifdef __loongarch__
+ return arch_loongarch;
+#else
#ifdef __aarch64__
return arch_aarch64;
#elif defined __m68k__
@@ -3159,6 +3162,7 @@
#endif
#endif
#endif
+#endif
#endif
#endif
#endif
diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn'
'--exclude=.svnignore' old/hwinfo-23.1/src/hd/hd.h new/hwinfo-23.2/src/hd/hd.h
--- old/hwinfo-23.1/src/hd/hd.h 2023-07-05 17:12:32.000000000 +0200
+++ new/hwinfo-23.2/src/hd/hd.h 2023-07-20 13:51:26.000000000 +0200
@@ -1448,6 +1448,7 @@
arch_mips,
arch_x86_64,
arch_aarch64,
+ arch_loongarch,
arch_riscv
} hd_cpu_arch_t;
diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn'
'--exclude=.svnignore' old/hwinfo-23.1/src/hd/hdp.c new/hwinfo-23.2/src/hd/hdp.c
--- old/hwinfo-23.1/src/hd/hdp.c 2023-07-05 17:12:32.000000000 +0200
+++ new/hwinfo-23.2/src/hd/hdp.c 2023-07-20 13:51:26.000000000 +0200
@@ -1117,6 +1117,9 @@
case arch_aarch64:
dump_line0 ("AArch64\n");
break;
+ case arch_loongarch:
+ dump_line0 ("LoongArch\n");
+ break;
case arch_riscv:
dump_line0 ("RISC-V\n");
break;
