Script 'mail_helper' called by obssrc
Hello community,

here is the log from the commit of package mcelog for openSUSE:Factory checked 
in at 2023-09-13 20:43:31
++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
Comparing /work/SRC/openSUSE:Factory/mcelog (Old)
 and      /work/SRC/openSUSE:Factory/.mcelog.new.1766 (New)
++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++

Package is "mcelog"

Wed Sep 13 20:43:31 2023 rev:63 rq:1110657 version:195

Changes:
--------
--- /work/SRC/openSUSE:Factory/mcelog/mcelog.changes    2023-06-17 
22:20:08.475475938 +0200
+++ /work/SRC/openSUSE:Factory/.mcelog.new.1766/mcelog.changes  2023-09-13 
20:43:52.072595577 +0200
@@ -1,0 +2,26 @@
+Tue Sep 12 14:08:37 UTC 2023 - tr...@suse.de
+
+- This contains following features:
+  PED-6122
+  [GNR] RAS: mcelog Add support for Granite Rapids (ALP)
+  PED-6102
+  [GNR] RAS: mcelog Add support for Granite Rapids (SLE 15 SP6)
+  PED-6021
+  [SRF] RAS: mcelog support for Sierra Forest (SLE 15 SP6)
+  PED-6050
+  [SRF] RAS: mcelog support for Sierra Forest (ALP)
+- Change git repo in _service file from git to https url
+- Update to version 195:
+  * mcelog: Wire up model-specific decoding for Sierra Forest
+  * mcelog: Add model-specific decoding for Granite Rapids
+  * client.c: fix build w/ musl libc
+  * mcelog: New model number for Arrowlake
+  * mcelog: Don't overwrite model number when lookup fails
+  * mcelog: Add Graniterapids, Grandridge and Sierraforest
+  * mcelog: New model number for Lunarlake
+  * mcelog: Add Emerald Rapids
+  * Update PFA_test_howto
+- Adopt to mainline:
+M email.patch
+
+-------------------------------------------------------------------

Old:
----
  mcelog-194.obscpio

New:
----
  mcelog-195.obscpio

++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++

Other differences:
------------------
++++++ mcelog.spec ++++++
--- /var/tmp/diff_new_pack.Ds9sN3/_old  2023-09-13 20:43:54.584684885 +0200
+++ /var/tmp/diff_new_pack.Ds9sN3/_new  2023-09-13 20:43:54.584684885 +0200
@@ -21,7 +21,7 @@
   %define _fillupdir %{_localstatedir}/adm/fillup-templates
 %endif
 Name:           mcelog
-Version:        194
+Version:        195
 Release:        0
 Summary:        Log Machine Check Events
 License:        GPL-2.0-only

++++++ _service ++++++
--- /var/tmp/diff_new_pack.Ds9sN3/_old  2023-09-13 20:43:54.628686450 +0200
+++ /var/tmp/diff_new_pack.Ds9sN3/_new  2023-09-13 20:43:54.632686592 +0200
@@ -1,7 +1,7 @@
 <services>
   <service name="obs_scm" mode="localonly">
     <param name="scm">git</param>
-    <param 
name="url">git://git.kernel.org/pub/scm/utils/cpu/mce/mcelog.git</param>
+    <param 
name="url">https://git.kernel.org/pub/scm/utils/cpu/mce/mcelog.git</param>
     <param name="changesgenerate">enable</param>
     <param name="versionrewrite-pattern">v(.*)</param>
     <param name="versionformat">@PARENT_TAG@</param>

++++++ _servicedata ++++++
--- /var/tmp/diff_new_pack.Ds9sN3/_old  2023-09-13 20:43:54.648687161 +0200
+++ /var/tmp/diff_new_pack.Ds9sN3/_new  2023-09-13 20:43:54.652687303 +0200
@@ -3,6 +3,10 @@
                 <param name="url">https://github.com/andikleen/mcelog</param>
               <param 
name="changesrevision">ee90ff20ce6a4d5e016aa249ce8b37f359f9fda4</param></service><service
 name="tar_scm">
                 <param 
name="url">git://git.kernel.org/pub/scm/utils/cpu/mce/mcelog.git</param>
-              <param 
name="changesrevision">04d51981e8805c4200f5a03b4216c8621bc52ace</param></service></servicedata>
+              <param 
name="changesrevision">04d51981e8805c4200f5a03b4216c8621bc52ace</param></service><service
 name="tar_scm">
+                <param 
name="url">https://github.com/andikleen/mcelog.git</param>
+              <param 
name="changesrevision">1f3a769c8fb736815a56ea104b7b751c5565cb88</param></service><service
 name="tar_scm">
+                <param 
name="url">https://git.kernel.org/pub/scm/utils/cpu/mce/mcelog.git</param>
+              <param 
name="changesrevision">1f3a769c8fb736815a56ea104b7b751c5565cb88</param></service></servicedata>
 (No newline at EOF)
 

++++++ email.patch ++++++
--- /var/tmp/diff_new_pack.Ds9sN3/_old  2023-09-13 20:43:54.680688298 +0200
+++ /var/tmp/diff_new_pack.Ds9sN3/_new  2023-09-13 20:43:54.680688298 +0200
@@ -7,10 +7,10 @@
  msg.c    |    8 ++
  6 files changed, 346 insertions(+), 3 deletions(-)
 
-Index: mcelog-194/Makefile
+Index: mcelog-195/Makefile
 ===================================================================
---- mcelog-194.orig/Makefile
-+++ mcelog-194/Makefile
+--- mcelog-195.orig/Makefile
++++ mcelog-195/Makefile
 @@ -1,3 +1,4 @@
 +CONFIG_EMAIL := 1
  CFLAGS := -g -Os
@@ -18,7 +18,7 @@
  etcprefix :=
 @@ -38,16 +39,24 @@ OBJ := p4.o k8.o mcelog.o dmi.o tsc.o co
         broadwell_de.o broadwell_epex.o skylake_xeon.o          \
-        denverton.o i10nm.o sapphire.o                          \
+        denverton.o i10nm.o sapphire.o granite.o                        \
         msr.o bus.o unknown.o lookup_intel_cputype.o
 +EMAIL_OBJ := email.o
  CLEAN := mcelog dmi tsc dbquery .depend .depend.X dbquery.o \
@@ -51,10 +51,10 @@
  
  version.tmp: FORCE
        ( printf "char version[] = \"" ;                        \
-Index: mcelog-194/email.c
+Index: mcelog-195/email.c
 ===================================================================
 --- /dev/null
-+++ mcelog-194/email.c
++++ mcelog-195/email.c
 @@ -0,0 +1,200 @@
 +#include <unistd.h>
 +#include <signal.h>
@@ -256,10 +256,10 @@
 +      smtp_destroy_session (session);
 +      return 0;
 +}
-Index: mcelog-194/email.h
+Index: mcelog-195/email.h
 ===================================================================
 --- /dev/null
-+++ mcelog-194/email.h
++++ mcelog-195/email.h
 @@ -0,0 +1,34 @@
 +#ifndef _MCELOG_EMAIL_H_
 +#define _MCELOG_EMAIL_H_
@@ -295,10 +295,10 @@
 +#endif
 +
 +#endif
-Index: mcelog-194/mcelog.c
+Index: mcelog-195/mcelog.c
 ===================================================================
---- mcelog-194.orig/mcelog.c
-+++ mcelog-194/mcelog.c
+--- mcelog-195.orig/mcelog.c
++++ mcelog-195/mcelog.c
 @@ -37,6 +37,7 @@
  #include <assert.h>
  #include <signal.h>
@@ -466,10 +466,10 @@
        checkdmi();
        general_setup();
                
-Index: mcelog-194/mcelog.h
+Index: mcelog-195/mcelog.h
 ===================================================================
---- mcelog-194.orig/mcelog.h
-+++ mcelog-194/mcelog.h
+--- mcelog-195.orig/mcelog.h
++++ mcelog-195/mcelog.h
 @@ -118,6 +118,7 @@ extern int open_logfile(char *fn);
  enum option_ranges {
        O_COMMON = 500,
@@ -478,10 +478,10 @@
  };
  
  enum syslog_opt { 
-Index: mcelog-194/msg.c
+Index: mcelog-195/msg.c
 ===================================================================
---- mcelog-194.orig/msg.c
-+++ mcelog-194/msg.c
+--- mcelog-195.orig/msg.c
++++ mcelog-195/msg.c
 @@ -8,10 +8,13 @@
  #include "mcelog.h"
  #include "msg.h"

++++++ mcelog-194.obscpio -> mcelog-195.obscpio ++++++
diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn' 
'--exclude=.svnignore' old/mcelog-194/Makefile new/mcelog-195/Makefile
--- old/mcelog-194/Makefile     2023-06-12 19:48:06.000000000 +0200
+++ new/mcelog-195/Makefile     2023-09-06 17:58:20.000000000 +0200
@@ -36,7 +36,7 @@
        client.o cache.o sysfs.o yellow.o page.o rbtree.o        \
        sandy-bridge.o ivy-bridge.o haswell.o                    \
        broadwell_de.o broadwell_epex.o skylake_xeon.o           \
-       denverton.o i10nm.o sapphire.o                           \
+       denverton.o i10nm.o sapphire.o granite.o                         \
        msr.o bus.o unknown.o lookup_intel_cputype.o
 CLEAN := mcelog dmi tsc dbquery .depend .depend.X dbquery.o \
        version.o version.c version.tmp cputype.h cputype.tmp \
diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn' 
'--exclude=.svnignore' old/mcelog-194/granite.c new/mcelog-195/granite.c
--- old/mcelog-194/granite.c    1970-01-01 01:00:00.000000000 +0100
+++ new/mcelog-195/granite.c    2023-09-06 17:58:20.000000000 +0200
@@ -0,0 +1,301 @@
+/* Copyright (C) 2022 Intel Corporation
+   Decode Intel Granite Rapids specific machine check errors.
+
+   mcelog is free software; you can redistribute it and/or
+   modify it under the terms of the GNU General Public
+   License as published by the Free Software Foundation; version
+   2.
+
+   mcelog is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   General Public License for more details.
+
+   You should find a copy of v2 of the GNU General Public License somewhere
+   on your Linux system; if not, write to the Free Software Foundation,
+   Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+
+   Author: Tony Luck
+*/
+
+#include "mcelog.h"
+#include "bitfield.h"
+#include "granite.h"
+#include "memdb.h"
+
+static char *upi_2[] = {
+       [0x00] = "UC Phy Initialization Failure (NumInit)",
+       [0x01] = "UC Phy Detected Drift Buffer Alarm",
+       [0x02] = "UC Phy Detected Latency Buffer Rollover",
+       [0x10] = "UC LL Rx detected CRC error: unsuccessful LLR (entered Abort 
state)",
+       [0x11] = "UC LL Rx Unsupported/Undefined packet",
+       [0x12] = "UC LL or Phy Control Error",
+       [0x13] = "UC LL Rx Parameter Exception",
+       [0x14] = "UC LL TDX Failure",
+       [0x15] = "UC LL SGX Failure",
+       [0x16] = "UC LL Tx SDC Parity Error",
+       [0x17] = "UC LL Rx SDC Parity Error",
+       [0x18] = "UC LL FLE Failure",
+       [0x1F] = "UC LL Detected Control Error",
+       [0x20] = "COR Phy Initialization Abort",
+       [0x21] = "COR Phy Inband Reset",
+       [0x22] = "COR Phy Lane failure, recovery in x8 width",
+       [0x23] = "COR Phy L0c error corrected without Phy reset",
+       [0x24] = "COR Phy L0c error triggering Phy reset",
+       [0x25] = "COR Phy L0p exit error corrected with reset",
+       [0x30] = "COR LL Rx detected CRC error: successful LLR without Phy 
Reinit",
+       [0x31] = "COR LL Rx detected CRC error: successful LLR with Phy Reinit",
+};
+
+static struct field upi2[] = {
+       FIELD(0, upi_2),
+       {}
+};
+
+static char *punit_errs_1[] = {
+       [0x02 ... 0x3] = "Power Management Unit microcontroller double-bit ECC 
error",
+       [0x08 ... 0x9] = "Power Management Unit microcontroller error",
+       [0x0a] = "Power Management Unit microcontroller patch load error",
+       [0x0b] = "Power Management Unit microcontroller POReqValid error",
+       [0x10] = "Power Management Unit microcontroller TeleSRAM double-bit ECC 
error",
+       [0x20] = "Power Management Agent signaled error",
+       [0x80] = "S3M signaled error",
+       [0xa0] = "Power Management Unit HPMSRAM double-bit ECC error detected",
+       [0xb0] = "Power Management Unit TPMISRAM double-bit ECC error detected",
+};
+
+static struct field punit1[] = {
+       FIELD(0, punit_errs_1),
+       {}
+};
+
+static char *punit_errs_2[] = {
+       [0x09] = "MCA_TSC_DOWNLOAD_TIMEOUT: TSC download timed out",
+       [0x0b] = "MCA_GPSB_TIMEOUT: GPSB does not respond within timeout value",
+       [0x0c] = "MCA_PMSB_TIMEOUT: PMSB does not respond within timeout value",
+       [0x10] = "MCA_PMAX_CALIB_ERROR: PMAX calibration error",
+       [0x1a] = "MCA_DISP_RUN_BUSY_TIMEOUT: Dispatcher busy beyond timeout",
+       [0x1d] = "MCA_MORE_THAN_ONE_LT_AGENT: During Boot Mode Processing, >1 
LT Agent detected",
+       [0x23] = "MCA_PCU_SVID_ERROR: SVID error",
+       [0x35] = "MCA_SVID_LOADLINE_INVALID: Invalid SVID VCCIN Loadline 
resistance value",
+       [0x36] = "MCA_SVID_ICCMAX_INVALID: Invalid SVID ICCMAX value",
+       [0x40] = "MCA_SVID_VIDMAX_INVALID: Invalid SVID VID_MAX value",
+       [0x41] = "MCA_SVID_VDDRAMP_INVALID: Invalid ramp voltage for VDD_RAMP",
+       [0x48] = "MCA_ITD_FUSE_INVALID: ITD fuse settings are not valid",
+       [0x49] = "MCA_SVID_DC_LL_INVALID: ITD fuse settings are not valid",
+       [0x4a] = "MCA_FIVR_PD_HARDERR: PM event has issued some FIVR Fault",
+       [0x4c] = "MCA_HPM_DOUBLE_BIT_ERROR_DETECTED: Read from HPM SRAM 
resulted in Double bit error",
+       [0x56] = "SVID_ACTIVE_VID_FUSE_ERROR: Invaid fuse values programmed for 
SVID Active vid",
+};
+
+static struct field punit2[] = {
+       FIELD(0, punit_errs_2),
+       {}
+};
+
+static char *b2cmi_1[] = {
+       [0x01] "Read ECC error",
+       [0x02] "Bucket1 error",
+       [0x03] "Tracker Parity error",
+       [0x04] "Security mismatch",
+       [0x07] "Read completion parity error",
+       [0x08] "Response parity error",
+       [0x09] "Timeout error",
+       [0x0a] "Address parity error",
+       [0x0c] "CMI credit over subscription error",
+       [0x0d] "SAI mismatch error",
+};
+
+static struct field b2cmi1[] = {
+       FIELD(0, b2cmi_1),
+       {}
+};
+
+static char *mcchan_0[] = {
+       [0x01] = "Address Parity Error (APPP)",
+       [0x02] = "CMI Wr data parity Error on sCH0",
+       [0x03] = "CMI Uncorr/Corr ECC error on sCH0",
+       [0x04] = "CMI Wr BE parity Error on sCH0",
+       [0x05] = "CMI Wr MAC parity Error on sCH0",
+       [0x08] = "Corr Patrol Scrub Error",
+       [0x10] = "UnCorr Patrol Scrub Error",
+       [0x20] = "Corr Spare Error",
+       [0x40] = "UnCorr Spare Error",
+       [0x80] = "Transient or Correctable Error for Demand or Underfill Reads",
+       [0xa0] = "Uncorrectable Error for Demand or Underfill Reads",
+       [0xb0] = "Poison was read from memory when poison was disabled in 
memory controller",
+       [0xc0] = "Read 2LM MetaData Error",
+};
+
+static char *mcchan_1[] = {
+       [0x00] = "WDB Read Parity Error on sCH0",
+       [0x02] = "WDB Read Uncorr/Corr ECC Error on sCH0",
+       [0x04] = "WDB BE Read Parity Error on sCH0",
+       [0x06] = "WDB Read Persistent Corr ECC Error on sCH0",
+       [0x08] = "DDR Link Fail",
+       [0x09] = "Illegal incoming opcode",
+};
+
+static char *mcchan_2[] = {
+       [0x00] = "DDR CAParity or WrCRC Error",
+};
+
+static char *mcchan_4[] = {
+       [0x00] = "Scheduler address parity error",
+};
+
+static char *mcchan_8[] = {
+       [0x32] = "MC Internal Errors",
+       [0x33] = "MCTracker Address RF parity error",
+};
+
+static char *mcchan_32[] = {
+       [0x02] = "CMI Wr data parity Error on sCH1",
+       [0x03] = "CMI Uncorr/Corr ECC error on sCH1",
+       [0x04] = "CMI Wr BE parity Error on sCH1",
+       [0x05] = "CMI Wr MAC parity Error on sCH1",
+};
+
+static char *mcchan_33[] = {
+       [0x00] = "WDB Read Parity Error on sCH1",
+       [0x02] = "WDB Read Uncorr/Corr ECC Error on sCH1",
+       [0x04] = "WDB BE Read Parity Error on sCH1",
+       [0x06] = "WDB Read Persistent Corr ECC Error on sCH1",
+};
+
+static struct field mcchan0[] = {
+       FIELD(0, mcchan_0),
+       {}
+};
+
+static struct field mcchan1[] = {
+       FIELD(0, mcchan_1),
+       {}
+};
+
+static struct field mcchan2[] = {
+       FIELD(0, mcchan_2),
+       {}
+};
+
+static struct field mcchan4[] = {
+       FIELD(0, mcchan_4),
+       {}
+};
+
+static struct field mcchan8[] = {
+       FIELD(0, mcchan_8),
+       {}
+};
+
+static struct field mcchan32[] = {
+       FIELD(0, mcchan_32),
+       {}
+};
+
+static struct field mcchan33[] = {
+       FIELD(0, mcchan_33),
+       {}
+};
+
+static void granite_imc_misc(u64 status, u64 misc)
+{
+       u64 mscod = EXTRACT(status, 16, 31);
+       u32 column = EXTRACT(misc, 9, 18) << 2;
+       u32 row = EXTRACT(misc, 19, 36);
+       u32 bank = EXTRACT(misc, 37, 38);
+       u32 bankgroup = EXTRACT(misc, 39, 41);
+       u32 fdevice = EXTRACT(misc, 43, 48);
+       u32 subrank = EXTRACT(misc, 51, 54);
+       u32 chipselect = EXTRACT(misc, 55, 57);
+       u32 eccmode = EXTRACT(misc, 58, 61);
+       u32 transient = EXTRACT(misc, 63, 63);
+
+       if (mscod >= 0x800 && mscod <= 0x82f)
+               return;
+
+       Wprintf("bank: 0x%x bankgroup: 0x%x row: 0x%x column: 0x%x\n", bank, 
bankgroup, row, column);
+       if (!transient)
+               Wprintf("failed device: 0x%x\n", fdevice);
+       Wprintf("chipselect: 0x%x subrank: 0x%x\n", chipselect, subrank);
+       Wprintf("ecc mode: ");
+       switch (eccmode) {
+       case 1: Wprintf("SDDC 128b 1LM\n"); break;
+       case 2: Wprintf("SDDC 125b 1LM\n"); break;
+       case 3: Wprintf("SDDC 96b 1LM\n"); break;
+       case 4: Wprintf("SDDC 96b 2LM\n"); break;
+       case 5: Wprintf("ADDDC 80b 1LM\n"); break;
+       case 6: Wprintf("ADDDC 80b 2LM\n"); break;
+       case 7: Wprintf("ADDDC 64b 1LM\n"); break;
+       case 8: Wprintf("9x4 61b 1LM\n"); break;
+       case 9: Wprintf("9x4 32b 1LM\n"); break;
+       case 10: Wprintf("9x4 32b 2LM\n"); break;
+       default: Wprintf("Invalid/unknown ECC mode\n"); break;
+       }
+       if (transient)
+               Wprintf("transient\n");
+}
+
+void granite_decode_model(int cputype, int bank, u64 status, u64 misc)
+{
+       u64 f;
+
+       switch (bank) {
+       case 5: /* UPI */
+               Wprintf("UPI: ");
+               f = EXTRACT(status, 16, 31);
+               decode_bitfield(f, upi2);
+               break;
+
+       case 6: /* Punit */
+               Wprintf("Punit: ");
+               f = EXTRACT(status, 16, 23);
+               decode_bitfield(f, punit1);
+               f = EXTRACT(status, 24, 31);
+               decode_bitfield(f, punit2);
+               break;
+
+       case 12: /* B2CMI */
+               Wprintf("B2CMI: ");
+               f = EXTRACT(status, 16, 31);
+               decode_bitfield(f, b2cmi1);
+               break;
+
+       case 13 ... 24: /* MCCHAN */
+               Wprintf("MCCHAN: ");
+               f = EXTRACT(status, 16, 23);
+               switch (EXTRACT(status, 24, 31)) {
+               case 0: decode_bitfield(f, mcchan0); break;
+               case 1: decode_bitfield(f, mcchan1); break;
+               case 2: decode_bitfield(f, mcchan2); break;
+               case 4: decode_bitfield(f, mcchan4); break;
+               case 8: decode_bitfield(f, mcchan8); break;
+               case 32: decode_bitfield(f, mcchan32); break;
+               case 33: decode_bitfield(f, mcchan33); break;
+               }
+
+               /* Decode MISC register if MISCV and OTHER_INFO[1] are both set 
*/
+               if (EXTRACT(status, 59, 59) && EXTRACT(status, 33, 33))
+                       granite_imc_misc(status, misc);
+               break;
+       }
+}
+
+void granite_memerr_misc(struct mce *m, int *channel, int *dimm)
+{
+       u64 status = m->status;
+       unsigned int chan;
+
+       /* Check this is a memory error */
+       if (!test_prefix(7, status & 0xefff))
+               return;
+
+       chan = EXTRACT(status, 0, 3);
+       if (chan == 0xf)
+               return;
+
+       if (m->bank < 13 || m->bank > 25)
+               return;
+
+       channel[0] = m->bank - 13;
+}
diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn' 
'--exclude=.svnignore' old/mcelog-194/granite.h new/mcelog-195/granite.h
--- old/mcelog-194/granite.h    1970-01-01 01:00:00.000000000 +0100
+++ new/mcelog-195/granite.h    2023-09-06 17:58:20.000000000 +0200
@@ -0,0 +1,2 @@
+void granite_decode_model(int cputype, int bank, u64 status, u64 misc);
+void granite_memerr_misc(struct mce *m, int *channel, int *dimm);
diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn' 
'--exclude=.svnignore' old/mcelog-194/intel.c new/mcelog-195/intel.c
--- old/mcelog-194/intel.c      2023-06-12 19:48:06.000000000 +0200
+++ new/mcelog-195/intel.c      2023-09-06 17:58:20.000000000 +0200
@@ -28,6 +28,7 @@
 #include "skylake_xeon.h"
 #include "i10nm.h"
 #include "sapphire.h"
+#include "granite.h"
 
 int memory_error_support;
 
@@ -111,6 +112,10 @@
                case CPU_EMERALDRAPIDS:
                        sapphire_memerr_misc(m, channel, dimm);
                        break;
+               case CPU_GRANITERAPIDS:
+               case CPU_SIERRAFOREST:
+                       granite_memerr_misc(m, channel, dimm);
+                       break;
                default:
                        break;
                } 
diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn' 
'--exclude=.svnignore' old/mcelog-194/p4.c new/mcelog-195/p4.c
--- old/mcelog-194/p4.c 2023-06-12 19:48:06.000000000 +0200
+++ new/mcelog-195/p4.c 2023-09-06 17:58:20.000000000 +0200
@@ -42,6 +42,7 @@
 #include "denverton.h"
 #include "i10nm.h"
 #include "sapphire.h"
+#include "granite.h"
 
 /* decode mce for P4/Xeon and Core2 family */
 
@@ -468,6 +469,10 @@
        case CPU_EMERALDRAPIDS:
                sapphire_decode_model(cputype, log->bank, log->status, 
log->misc);
                break;
+       case CPU_GRANITERAPIDS:
+       case CPU_SIERRAFOREST:
+               granite_decode_model(cputype, log->bank, log->status, 
log->misc);
+               break;
        case CPU_DENVERTON:
                denverton_decode_model(cputype, log->bank, log->status, 
log->misc);
                break;

++++++ mcelog.obsinfo ++++++
--- /var/tmp/diff_new_pack.Ds9sN3/_old  2023-09-13 20:43:54.824693418 +0200
+++ /var/tmp/diff_new_pack.Ds9sN3/_new  2023-09-13 20:43:54.824693418 +0200
@@ -1,5 +1,5 @@
 name: mcelog
-version: 194
-mtime: 1686592086
-commit: 04d51981e8805c4200f5a03b4216c8621bc52ace
+version: 195
+mtime: 1694015900
+commit: 1f3a769c8fb736815a56ea104b7b751c5565cb88
 

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