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Hello community,

here is the log from the commit of package libusrp for openSUSE:Factory checked 
in at 2023-09-20 13:23:40
++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
Comparing /work/SRC/openSUSE:Factory/libusrp (Old)
 and      /work/SRC/openSUSE:Factory/.libusrp.new.16627 (New)
++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++

Package is "libusrp"

Wed Sep 20 13:23:40 2023 rev:6 rq:1111635 version:3.4.8

Changes:
--------
--- /work/SRC/openSUSE:Factory/libusrp/libusrp.changes  2023-03-08 
14:52:55.342790328 +0100
+++ /work/SRC/openSUSE:Factory/.libusrp.new.16627/libusrp.changes       
2023-09-20 13:25:10.618020109 +0200
@@ -1,0 +2,10 @@
+Thu Sep 14 22:36:14 UTC 2023 - Wojciech Kazubski <w...@ire.pw.edu.pl>
+
+- Update to version 3.4.8
+  * configure: abort if SDCC is not found
+  * Cosmetic: contrib/jenkins.sh: fix typo
+  * linter: Don't check header files
+  * cosmetic: fx2regs.h: Fix trailing whitespace
+  * Fix compilation with newer sdcc
+ 
+-------------------------------------------------------------------

Old:
----
  libusrp-3.4.7.tar.xz

New:
----
  libusrp-3.4.8.tar.xz

++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++

Other differences:
------------------
++++++ libusrp.spec ++++++
--- /var/tmp/diff_new_pack.PDEa0x/_old  2023-09-20 13:25:11.906066254 +0200
+++ /var/tmp/diff_new_pack.PDEa0x/_new  2023-09-20 13:25:11.906066254 +0200
@@ -20,7 +20,7 @@
 %define sover   1
 %define libname libusrp%{sover}
 Name:           libusrp
-Version:        3.4.7
+Version:        3.4.8
 Release:        0
 Summary:        Stand-alone libusrp for USRP1 from old gnuradio.git
 License:        GPL-3.0-or-later

++++++ _service ++++++
--- /var/tmp/diff_new_pack.PDEa0x/_old  2023-09-20 13:25:11.934067258 +0200
+++ /var/tmp/diff_new_pack.PDEa0x/_new  2023-09-20 13:25:11.934067258 +0200
@@ -2,8 +2,8 @@
        <service name="tar_scm" mode="disabled">
                <param name="scm">git</param>
                <param name="url">git://git.osmocom.org/libusrp</param>
-               <param name="parent-tag">3.4.7</param>
-               <param name="versionformat">3.4.7</param>
+               <param name="parent-tag">3.4.8</param>
+               <param name="versionformat">3.4.8</param>
        </service>
        <service name="recompress" mode="disabled">
                <param name="file">*.tar</param>

++++++ libusrp-3.4.7.tar.xz -> libusrp-3.4.8.tar.xz ++++++
diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn' 
'--exclude=.svnignore' old/libusrp-3.4.7/.checkpatch.conf 
new/libusrp-3.4.8/.checkpatch.conf
--- old/libusrp-3.4.7/.checkpatch.conf  1970-01-01 01:00:00.000000000 +0100
+++ new/libusrp-3.4.8/.checkpatch.conf  2023-09-12 12:28:52.000000000 +0200
@@ -0,0 +1 @@
+--exclude .*h
diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn' 
'--exclude=.svnignore' old/libusrp-3.4.7/contrib/jenkins.sh 
new/libusrp-3.4.8/contrib/jenkins.sh
--- old/libusrp-3.4.7/contrib/jenkins.sh        2023-02-09 17:19:31.000000000 
+0100
+++ new/libusrp-3.4.8/contrib/jenkins.sh        2023-09-12 12:28:52.000000000 
+0200
@@ -4,6 +4,6 @@
 
 autoreconf --install --force
 ./configure
-$MAKE # Parallel make fails ocsasionally, see OS#3970.
+$MAKE # Parallel make fails occasionally, see OS#3970.
 $MAKE distcheck
 $MAKE maintainer-clean
diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn' 
'--exclude=.svnignore' old/libusrp-3.4.7/debian/changelog 
new/libusrp-3.4.8/debian/changelog
--- old/libusrp-3.4.7/debian/changelog  2023-02-09 17:19:31.000000000 +0100
+++ new/libusrp-3.4.8/debian/changelog  2023-09-12 12:28:52.000000000 +0200
@@ -1,3 +1,18 @@
+libusrp (3.4.8) unstable; urgency=medium
+
+  [ Oliver Smith ]
+  * configure: abort if SDCC is not found
+  * debian: set compat level to 10
+  * Cosmetic: contrib/jenkins.sh: fix typo
+  * debian/rules: don't build in parallel
+
+  [ Pau Espin Pedrol ]
+  * linter: Don't check header files
+  * cosmetic: fx2regs.h: Fix trailing whitespace
+  * Fix compilation with newer sdcc
+
+ -- Pau Espin Pedrol <pes...@sysmocom.de>  Tue, 12 Sep 2023 12:28:51 +0200
+
 libusrp (3.4.7) unstable; urgency=medium
 
   [ Oliver Smith ]
diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn' 
'--exclude=.svnignore' old/libusrp-3.4.7/debian/compat 
new/libusrp-3.4.8/debian/compat
--- old/libusrp-3.4.7/debian/compat     2023-02-09 17:19:31.000000000 +0100
+++ new/libusrp-3.4.8/debian/compat     2023-09-12 12:28:52.000000000 +0200
@@ -1 +1 @@
-9
+10
diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn' 
'--exclude=.svnignore' old/libusrp-3.4.7/debian/control 
new/libusrp-3.4.8/debian/control
--- old/libusrp-3.4.7/debian/control    2023-02-09 17:19:31.000000000 +0100
+++ new/libusrp-3.4.8/debian/control    2023-09-12 12:28:52.000000000 +0200
@@ -1,7 +1,7 @@
 Source: libusrp
 Priority: optional
-Maintainer: Pau Espin Pedrol <pes...@sysmocom.de>
-Build-Depends: debhelper (>=9),
+Maintainer: Osmocom team <open...@lists.osmocom.org>
+Build-Depends: debhelper (>= 10),
                dh-autoreconf,
                autotools-dev,
                autoconf,
diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn' 
'--exclude=.svnignore' old/libusrp-3.4.7/debian/rules 
new/libusrp-3.4.8/debian/rules
--- old/libusrp-3.4.7/debian/rules      2023-02-09 17:19:31.000000000 +0100
+++ new/libusrp-3.4.8/debian/rules      2023-09-12 12:28:52.000000000 +0200
@@ -9,8 +9,9 @@
 #export DH_VERBOSE=1
 
 
+# --no-parallel: OS#3970
 %:
-       dh $@ --with autoreconf --fail-missing
+       dh $@ --with autoreconf --fail-missing --no-parallel
 
 override_dh_auto_configure:
        dh_auto_configure -- --enable-doxygen
diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn' 
'--exclude=.svnignore' old/libusrp-3.4.7/firmware/include/fx2regs.h 
new/libusrp-3.4.8/firmware/include/fx2regs.h
--- old/libusrp-3.4.7/firmware/include/fx2regs.h        2023-02-09 
17:19:31.000000000 +0100
+++ new/libusrp-3.4.8/firmware/include/fx2regs.h        2023-09-12 
12:28:52.000000000 +0200
@@ -1,19 +1,19 @@
 /* -*- c++ -*- */
 /*
  * Copyright 2003 Free Software Foundation, Inc.
- * 
+ *
  * This file is part of GNU Radio
- * 
+ *
  * GNU Radio is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License as published by
  * the Free Software Foundation; either version 3, or (at your option)
  * any later version.
- * 
+ *
  * GNU Radio is distributed in the hope that it will be useful,
  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  * GNU General Public License for more details.
- * 
+ *
  * You should have received a copy of the GNU General Public License
  * along with GNU Radio; see the file COPYING.  If not, write to
  * the Free Software Foundation, Inc., 51 Franklin Street,
@@ -45,18 +45,18 @@
 // FX2 Related Register Assignments
 //-----------------------------------------------------------------------------
 
-// The Ez-USB FX2 registers are defined here. We use FX2regs.h for register 
-// address allocation by using "#define ALLOCATE_EXTERN". 
-// When using "#define ALLOCATE_EXTERN", you get (for instance): 
+// The Ez-USB FX2 registers are defined here. We use FX2regs.h for register
+// address allocation by using "#define ALLOCATE_EXTERN".
+// When using "#define ALLOCATE_EXTERN", you get (for instance):
 // __xdata volatile BYTE OUT7BUF[64]   _at_   0x7B40;
-// Such lines are created from FX2.h by using the preprocessor. 
-// Incidently, these lines will not generate any space in the resulting hex 
-// file; they just bind the symbols to the addresses for compilation. 
-// You just need to put "#define ALLOCATE_EXTERN" in your main program file; 
-// i.e. fw.c or a stand-alone C source file. 
-// Without "#define ALLOCATE_EXTERN", you just get the external reference: 
+// Such lines are created from FX2.h by using the preprocessor.
+// Incidently, these lines will not generate any space in the resulting hex
+// file; they just bind the symbols to the addresses for compilation.
+// You just need to put "#define ALLOCATE_EXTERN" in your main program file;
+// i.e. fw.c or a stand-alone C source file.
+// Without "#define ALLOCATE_EXTERN", you just get the external reference:
 // extern __xdata volatile BYTE OUT7BUF[64]   ;//   0x7B40;
-// This uses the concatenation operator "##" to insert a comment "//" 
+// This uses the concatenation operator "##" to insert a comment "//"
 // to cut off the end of the line, "_at_   0x7B40;", which is not wanted.
 */
 
@@ -273,10 +273,10 @@
 EXTERN __xdata _AT_(0xE6C8) volatile BYTE FLOWEQ0CTL        ; //CTL states 
during active flow state
 EXTERN __xdata _AT_(0xE6C9) volatile BYTE FLOWEQ1CTL        ; //CTL states 
during hold flow state
 EXTERN __xdata _AT_(0xE6CA) volatile BYTE FLOWHOLDOFF       ;
-EXTERN __xdata _AT_(0xE6CB) volatile BYTE FLOWSTB           ; //CTL/RDY Signal 
to use as master data strobe 
+EXTERN __xdata _AT_(0xE6CB) volatile BYTE FLOWSTB           ; //CTL/RDY Signal 
to use as master data strobe
 EXTERN __xdata _AT_(0xE6CC) volatile BYTE FLOWSTBEDGE       ; //Defines active 
master strobe edge
 EXTERN __xdata _AT_(0xE6CD) volatile BYTE FLOWSTBHPERIOD    ; //Half Period of 
output master strobe
-EXTERN __xdata _AT_(0xE60C) volatile BYTE GPIFHOLDAMOUNT    ; //Data delay 
shift 
+EXTERN __xdata _AT_(0xE60C) volatile BYTE GPIFHOLDAMOUNT    ; //Data delay 
shift
 EXTERN __xdata _AT_(0xE67D) volatile BYTE UDMACRCH          ; //CRC Upper byte
 EXTERN __xdata _AT_(0xE67E) volatile BYTE UDMACRCL          ; //CRC Lower byte
 EXTERN __xdata _AT_(0xE67F) volatile BYTE UDMACRCQUAL       ; //UDMA In only, 
host terminated use only
@@ -308,8 +308,8 @@
 /*-----------------------------------------------------------------------------
    Special Function Registers (SFRs)
    The byte registers and bits defined in the following list are based
-   on the Synopsis definition of the 8051 Special Function Registers for 
EZ-USB. 
-    If you modify the register definitions below, please regenerate the file 
+   on the Synopsis definition of the 8051 Special Function Registers for 
EZ-USB.
+    If you modify the register definitions below, please regenerate the file
     "ezregs.inc" which includes the same basic information for assembly 
inclusion.
 -----------------------------------------------------------------------------*/
 
@@ -321,7 +321,7 @@
 __sfr __at 0x85 DPH1;
 __sfr __at 0x86 DPS;
          /*  DPS  */
-         __sbit __at 0x86+0 SEL;
+         __sbit __at (0x86+0) SEL;
 __sfr __at 0x87 PCON;   /*  PCON  */
          //__sbit IDLE   = 0x87+0;
          //__sbit STOP   = 0x87+1;
@@ -330,14 +330,14 @@
          //__sbit SMOD0  = 0x87+7;
 __sfr __at 0x88 TCON;
          /*  TCON  */
-         __sbit __at 0x88+0 IT0;
-         __sbit __at 0x88+1 IE0;
-         __sbit __at 0x88+2 IT1;
-         __sbit __at 0x88+3 IE1;
-         __sbit __at 0x88+4 TR0;
-         __sbit __at 0x88+5 TF0;
-         __sbit __at 0x88+6 TR1;
-         __sbit __at 0x88+7 TF1;
+         __sbit __at (0x88+0) IT0;
+         __sbit __at (0x88+1) IE0;
+         __sbit __at (0x88+2) IT1;
+         __sbit __at (0x88+3) IE1;
+         __sbit __at (0x88+4) TR0;
+         __sbit __at (0x88+5) TF0;
+         __sbit __at (0x88+6) TR1;
+         __sbit __at (0x88+7) TF1;
 __sfr __at 0x89 TMOD;
          /*  TMOD  */
          //__sbit M00    = 0x89+0;
@@ -373,21 +373,21 @@
 __sfr __at 0x92 MPAGE;
 __sfr __at 0x98 SCON0;
          /*  SCON0  */
-         __sbit __at 0x98+0 RI;
-         __sbit __at 0x98+1 TI;
-         __sbit __at 0x98+2 RB8;
-         __sbit __at 0x98+3 TB8;
-         __sbit __at 0x98+4 REN;
-         __sbit __at 0x98+5 SM2;
-         __sbit __at 0x98+6 SM1;
-         __sbit __at 0x98+7 SM0;
+         __sbit __at (0x98+0) RI;
+         __sbit __at (0x98+1) TI;
+         __sbit __at (0x98+2) RB8;
+         __sbit __at (0x98+3) TB8;
+         __sbit __at (0x98+4) REN;
+         __sbit __at (0x98+5) SM2;
+         __sbit __at (0x98+6) SM1;
+         __sbit __at (0x98+7) SM0;
 __sfr __at 0x99 SBUF0;
 
 __sfr __at 0x9A APTR1H;
 __sfr __at 0x9B APTR1L;
-__sfr __at 0x9C AUTODAT1; 
+__sfr __at 0x9C AUTODAT1;
 __sfr __at 0x9D AUTOPTRH2;
-__sfr __at 0x9E AUTOPTRL2; 
+__sfr __at 0x9E AUTOPTRL2;
 __sfr __at 0x9F AUTODAT2;
 __sfr __at 0xA0 IOC;
 __sfr __at 0xA1 INT2CLR;
@@ -398,14 +398,14 @@
 
 __sfr __at 0xA8 IE;
          /*  IE  */
-         __sbit __at 0xA8+0 EX0;
-         __sbit __at 0xA8+1 ET0;
-         __sbit __at 0xA8+2 EX1;
-         __sbit __at 0xA8+3 ET1;
-         __sbit __at 0xA8+4 ES0;
-         __sbit __at 0xA8+5 ET2;
-         __sbit __at 0xA8+6 ES1;
-         __sbit __at 0xA8+7 EA;
+         __sbit __at (0xA8+0) EX0;
+         __sbit __at (0xA8+1) ET0;
+         __sbit __at (0xA8+2) EX1;
+         __sbit __at (0xA8+3) ET1;
+         __sbit __at (0xA8+4) ES0;
+         __sbit __at (0xA8+5) ET2;
+         __sbit __at (0xA8+6) ES1;
+         __sbit __at (0xA8+7) EA;
 
 __sfr __at 0xAA EP2468STAT;
          /* EP2468STAT */
@@ -436,78 +436,78 @@
 
 __sfr __at 0xB8 IP;
          /*  IP  */
-         __sbit __at 0xB8+0 PX0;
-         __sbit __at 0xB8+1 PT0;
-         __sbit __at 0xB8+2 PX1;
-         __sbit __at 0xB8+3 PT1;
-         __sbit __at 0xB8+4 PS0;
-         __sbit __at 0xB8+5 PT2;
-         __sbit __at 0xB8+6 PS1;
+         __sbit __at (0xB8+0) PX0;
+         __sbit __at (0xB8+1) PT0;
+         __sbit __at (0xB8+2) PX1;
+         __sbit __at (0xB8+3) PT1;
+         __sbit __at (0xB8+4) PS0;
+         __sbit __at (0xB8+5) PT2;
+         __sbit __at (0xB8+6) PS1;
 
 __sfr __at 0xBA EP01STAT;
 __sfr __at 0xBB GPIFTRIG;
-                
+
 __sfr __at 0xBD GPIFSGLDATH;
 __sfr __at 0xBE GPIFSGLDATLX;
 __sfr __at 0xBF GPIFSGLDATLNOX;
 
 __sfr __at 0xC0 SCON1;
          /*  SCON1  */
-         __sbit __at 0xC0+0 RI1;
-         __sbit __at 0xC0+1 TI1;
-         __sbit __at 0xC0+2 RB81;
-         __sbit __at 0xC0+3 TB81;
-         __sbit __at 0xC0+4 REN1;
-         __sbit __at 0xC0+5 SM21;
-         __sbit __at 0xC0+6 SM11;
-         __sbit __at 0xC0+7 SM01;
+         __sbit __at (0xC0+0) RI1;
+         __sbit __at (0xC0+1) TI1;
+         __sbit __at (0xC0+2) RB81;
+         __sbit __at (0xC0+3) TB81;
+         __sbit __at (0xC0+4) REN1;
+         __sbit __at (0xC0+5) SM21;
+         __sbit __at (0xC0+6) SM11;
+         __sbit __at (0xC0+7) SM01;
 __sfr __at 0xC1 SBUF1;
 __sfr __at 0xC8 T2CON;
          /*  T2CON  */
-        __sbit __at 0xC8+0 CP_RL2;
-        __sbit __at 0xC8+1 C_T2;
-         __sbit __at 0xC8+2 TR2;
-         __sbit __at 0xC8+3 EXEN2;
-         __sbit __at 0xC8+4 TCLK;
-         __sbit __at 0xC8+5 RCLK;
-         __sbit __at 0xC8+6 EXF2;
-         __sbit __at 0xC8+7 TF2;
+        __sbit __at (0xC8+0) CP_RL2;
+        __sbit __at (0xC8+1) C_T2;
+         __sbit __at (0xC8+2) TR2;
+         __sbit __at (0xC8+3) EXEN2;
+         __sbit __at (0xC8+4) TCLK;
+         __sbit __at (0xC8+5) RCLK;
+         __sbit __at (0xC8+6) EXF2;
+         __sbit __at (0xC8+7) TF2;
 __sfr __at 0xCA RCAP2L;
 __sfr __at 0xCB RCAP2H;
 __sfr __at 0xCC TL2;
 __sfr __at 0xCD TH2;
 __sfr __at 0xD0 PSW;
          /*  PSW  */
-         __sbit __at 0xD0+0 P;
-         __sbit __at 0xD0+1 FL;
-         __sbit __at 0xD0+2 OV;
-         __sbit __at 0xD0+3 RS0;
-         __sbit __at 0xD0+4 RS1;
-         __sbit __at 0xD0+5 F0;
-         __sbit __at 0xD0+6 AC;
-         __sbit __at 0xD0+7 CY;
+         __sbit __at (0xD0+0) P;
+         __sbit __at (0xD0+1) FL;
+         __sbit __at (0xD0+2) OV;
+         __sbit __at (0xD0+3) RS0;
+         __sbit __at (0xD0+4) RS1;
+         __sbit __at (0xD0+5) F0;
+         __sbit __at (0xD0+6) AC;
+         __sbit __at (0xD0+7) CY;
 __sfr __at 0xD8 EICON; // Was WDCON in DS80C320 EICON; Bit Values differ from 
Reg320
          /*  EICON  */
-         __sbit __at 0xD8+3 INT6;
-         __sbit __at 0xD8+4 RESI;
-         __sbit __at 0xD8+5 ERESI;
-         __sbit __at 0xD8+7 SMOD1;
+         __sbit __at (0xD8+3) INT6;
+         __sbit __at (0xD8+4) RESI;
+         __sbit __at (0xD8+5) ERESI;
+         __sbit __at (0xD8+7) SMOD1;
 __sfr __at 0xE0 ACC;
 __sfr __at 0xE8 EIE; // EIE Bit Values differ from Reg320
                         /*  EIE  */
-         __sbit __at 0xE8+0 EIUSB;
-         __sbit __at 0xE8+1 EI2C;
-         __sbit __at 0xE8+2 EIEX4;
-         __sbit __at 0xE8+3 EIEX5;
-         __sbit __at 0xE8+4 EIEX6;
+         __sbit __at (0xE8+0) EIUSB;
+         __sbit __at (0xE8+1) EI2C;
+         __sbit __at (0xE8+2) EIEX4;
+         __sbit __at (0xE8+3) EIEX5;
+         __sbit __at (0xE8+4) EIEX6;
 __sfr __at 0xF0 B;
 __sfr __at 0xF8 EIP; // EIP Bit Values differ from Reg320
                         /*  EIP  */
-         __sbit __at 0xF8+0 PUSB;
-         __sbit __at 0xF8+1 PI2C;
-         __sbit __at 0xF8+2 EIPX4;
-         __sbit __at 0xF8+3 EIPX5;
-         __sbit __at 0xF8+4 EIPX6;
+         __sbit __at (0xF8+0) PUSB;
+         __sbit __at (0xF8+1) PI2C;
+         __sbit __at (0xF8+2) EIPX4;
+         __sbit __at (0xF8+3) EIPX5;
+         __sbit __at (0xF8+4) EIPX6;
 
 /*-----------------------------------------------------------------------------
    Bit Masks
@@ -666,7 +666,7 @@
 
 /*
  * Chip Revision Control Bits (REVCTL) - used to ebable/disable revision 
specific features
- */ 
+ */
 #define bmNOAUTOARM    bmBIT1  // these don't match the docs
 #define bmSKIPCOMMIT   bmBIT0  // these don't match the docs
 
diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn' 
'--exclude=.svnignore' old/libusrp-3.4.7/firmware/src/usrp2/usrp_rev2_regs.h 
new/libusrp-3.4.8/firmware/src/usrp2/usrp_rev2_regs.h
--- old/libusrp-3.4.7/firmware/src/usrp2/usrp_rev2_regs.h       2023-02-09 
17:19:31.000000000 +0100
+++ new/libusrp-3.4.8/firmware/src/usrp2/usrp_rev2_regs.h       2023-09-12 
12:28:52.000000000 +0200
@@ -47,9 +47,9 @@
 #define        bmPA_TX_UNDERRUN        bmBIT7          // misc pin to FPGA 
(underflow)
 
 
-__sbit __at 0x80+0 bitS_CLK;           // 0x80 is the bit address of PORT A
-__sbit __at 0x80+1 bitS_OUT;           // out from FX2 point of view
-__sbit __at 0x80+2 bitS_IN;                    // in from FX2 point of view
+__sbit __at (0x80+0) bitS_CLK;         // 0x80 is the bit address of PORT A
+__sbit __at (0x80+1) bitS_OUT;         // out from FX2 point of view
+__sbit __at (0x80+2) bitS_IN;                  // in from FX2 point of view
 
 
 /* all outputs except S_DATA_FROM_PERIPH, FX2_2, FX2_3 */
@@ -85,8 +85,8 @@
 #define        bmPC_LED0               bmBIT6          // active low
 #define        bmPC_LED1               bmBIT7          // active low
 
-__sbit __at 0xA0+1 bitALTERA_DATA0;            // 0xA0 is the bit address of 
PORT C
-__sbit __at 0xA0+3 bitALTERA_DCLK;
+__sbit __at (0xA0+1) bitALTERA_DATA0;          // 0xA0 is the bit address of 
PORT C
+__sbit __at (0xA0+3) bitALTERA_DCLK;
 
 
 #define        bmALTERA_BITS           (bmALTERA_DATA0                 \

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